iMX6ULL ADC 'step' in readings

Hi Toradex,

I have noticed a ‘step’ in the ADC readings from the internal ADC on the Colibri iMX6ULL. The step appears around the 1.7V mark (about half way). On further investigation, it appears the pad configurations for the ADC pins are not set in the Toradex device tree file imx6ull-colibri.dtsi. Hence these SOM pins will stay set to the reset default values, which have the “keeper” enabled.

The NXP iMX6ULL Reference Manual section 13.2 ADC: External Signals has a note stating:

NOTE: The ADC input signals connect to GPIO[0:9]. The GPIO default configuration is enabled for keeper. The keeper causes an undesired jump behavior in ADC. To avoid the problem, disable keeper before starting ADC. For detailed information about keeper, refer to the GPIO block.

I’ve added the following sections to imx6ull-colibri.dtsi:

&adc1 {
	num-channels = <10>;
	vref-supply = <&reg_module_3v3_avdd>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_adc1>;

pinctrl_adc1: adc1grp {
	fsl,pins = <
		/* ADC pins: 100k Pull down, low speed, output driver disabled. */
		MX6UL_PAD_GPIO1_IO00__GPIO1_IO00		0x3000 /* SODIMM 8 */
		MX6UL_PAD_GPIO1_IO01__GPIO1_IO01		0x3000 /* SODIMM 6 */
		MX6UL_PAD_GPIO1_IO08__GPIO1_IO08		0x3000 /* SODIMM 4 */
		MX6UL_PAD_GPIO1_IO09__GPIO1_IO09		0x3000 /* SODIMM 2 */

This removed the ‘step’ in the ADC readings. I recommend Toradex do the same with their own kernel source. This would not have been an issue for SOMs with the external STMPE811 ADC.


Hi Derrick,

Thanks for pointing this out. We were not aware of this behavior until now. Funnily even NXP sets the keeper enable for the ADC on the EVK (imx6ull-14x14-ddr3-arm2-adc.dts respectively imx6ull-14x14-ddr3-arm2.dts).

Best Regards,