IMX6Q carrier board design

Hi,

I make a carrier board for Apalis IMX6 and I have 5 questions :

1 - What can I do with TS_ signals if not used? I think I do not connect them, but I want to be sure.

2 - I use the vga video signal but i do not have a monitor, so no DDC. Can i just left the I2C2(DDC) to pull up and use an internal configuration?

3 - I want to output PAL and NTSC format on this VGA. Any problem to do that?

Apalis iMX6 # setenv vidargs video=mxcfb0:dev=vga,(NTSC or PAL),if=RGB24 video=mxcfb1:off video=mxcfb2:off video=mxcfb3:off fbmem=32M
Apalis iMX6 # saveenv

4 - I use the VGA output for my design. Could you give me the internal VGA DAC reference of my IMX6?

5 - If i want a 75ohm input AC-coupled. Is that the correct schematic?

Regards

Hi Mathias

1: You can leave the TS_ signals unconnected.

2: You can put a pull-up resistor to DDC, but it is not required. But be sure that you disable DDC in software.

3: I checked quickly your AD723 datasheet. It looks like you need the specific clock on 4FSC input either for PAL or NTSC. I would recommend to work first with our Apalis Evaluation Board and AD723 Evaluation Board before designing a carrier board. Please have a look at our developer site about display resolution and timings:

Please have also a look on the i.MX6 NXP support community. On the Linux site there is no interlaced output:

Instead of using the VGA output, it is possible to use directly the parallel 24 Bit RGB signals named LCD1_XY from the MXM3 connector beginning with pin 251. It could be easier to use this digital signals for your purpose. As an example have a look at Chrontel’s CH7025 with internal memory what allows interlacing.

4: Please understand that we can’t share our module’s schematic, but it is a simple resistor DAC, which works fine for lower resolutions below XVGA.

5: I think it is not completely correct. Please compare your schematic with the AD723 datasheet and our Layout Design Guide:

Especially Figure 49 on Page 38. It is correct that you need a 150 Ohm resistor after the 50 Ohm trace impedance, but after that it requires a 75 Ohm Monitor Load and this is missing. So you need a 75 Ohm resistor parallel to the 150 Ohm. Or in total you can change the values just to 50 Ohm.

But in general please try first with the evaluation board, before putting time and money in a carrier board design.

Best regards

Andrija

Hi Mathias

Thank you for contacting us again about your Apalis iMX6 Carrier Board Design.

Somewhere the interlacing has to take place.
There are two possible solution to solve your issue in my opinion.

The first would be to interlace the video stream in the iMX6 SoC and use ADV7393 with 16 Bit RGB input from the Apalis Module to create CVBS output.
There are already some patches to add the interlacing feature to the kernel, but you have to forward port them for your kernel version.

The second solution would be to have an IC on the carrier board, which does the interlacing.

If you want to use one from AnalogDevices, then please look for one with Video Signal Processing (VSP). e.g. ADV8005, where you need external memory for video and frame conversion.

I think it would be easier to do interlacing on the iMX6 and use ADV7393. Therefore you have to spend some time to update the Software and test it with the Evaluation Board.

We used CH7022 on our old Intel based modules Robin Z5xx. It was just mentioned as an example, that you need an advanced IC with memory.

I hope you can continue with your work. Please don’t hesitate to ask if you have any further questions about this topic. I am glad to help you.

BR Andrija

Hi Matthias,

I tried to apply the patches on top of our toradex_4.9-1.0.x-imx branch. There were only minor hiccups. Please find them here.

Have a look here on how to compile the kernel from source.

Regards
Max

Hi

I’ve already try to compile the kernel from source. If i change nothing that works great. But when i want to change it, that make some bug…

What is the bug?

I don’t understand why NTSC and PAL have the same pixel clock in the patch comment. Any idea?

The value of the pixel clock is equal to (hpixel+hblanking)*(vpixel+vlanking)*fps. For Pal the resolution is higher, but the frame rate is smaller and vice versa for NTSC. This explains the same pixel clock value.

Last question, If i just add these lign, that not enough. I have to tell somewhere that the definition (720x480i) correpond to this index …

What do you mean with that?

do you see anything wrong in my proposal? I just make the change before the make apalis_imx6_defconfig command

No, it looks ok.

Ok, thanks

For the bug => I made a mistake in the link of my library. It’s OK now

Thanks for the pixel clock value answer.

For the test, i check with different vidargs and it seems to take the good value.

setenv vidargs video=mxcfb0:dev=vdac,720x576M,if=RGB565 video=mxcfb1:off video=mxcfb2:off video=mxcfb3:off fbmem=32M
[    0.575000] fbcvt: 720x576@60: CVT Name - .414M4
[    0.575060] mxc_sdc_fb fb@0: registered mxc display driver vdac
[    0.579552] mxc_sdc_fb fb@0: 720x576 h_sync,r,l: 72,24,96  v_sync,l,u: 7,3,13 pixclock=32750000 Hz
[    0.636291] mxc_sdc_fb fb@0: 720x576 h_sync,r,l: 72,24,96  v_sync,l,u: 7,3,13 pixclock=32750000 Hz
setenv vidargs video=mxcfb0:dev=vdac,720x480,if=RGB565 video=mxcfb1:off video=mxcfb2:off video=mxcfb3:off fbmem=32M
[    0.574968] mxc_sdc_fb fb@0: registered mxc display driver vdac
[    0.578843] mxc_sdc_fb fb@0: 720x480 h_sync,r,l: 124,38,114  v_sync,l,u: 6,8,31 pixclock=13500000 Hz
[    0.641308] mxc_sdc_fb fb@0: 720x480 h_sync,r,l: 124,38,114  v_sync,l,u: 6,8,31 pixclock=13500000 Hz

I’m not sure it’s a true interlaced mode. But I’ll check when i have found the material.

Thanks for the feedback. Let us know once you checked for the true interlaced mode.

Could you ask a new question, please? Thanks.

Hello,

We tried to check as you say with a dev board but “analog devices” have a problem to provide us with one.

So I would like to use the ADV7393 instead of the AD723.
http://www.analog.com/en/products/adv7393.html#product-overview

I want to use it in NTSC/PAL 16 bits SDR RBG input mode with CVBS output.

Do you think this module could be a better choice than the AD723?

EDIT 02/10/2018 10h :
I don’t understand the square pixel mode. Can apalis do this format? it is interlaced?

If i understand, that look like this :

PAL square pixel (table 97 of adv7393 datasheet)
setenv vidargs video=mxcfb0:dev=lcd,768x576M@25,if=RGB24 video=mxcfb1:off video=mxcfb2:off video=mxcfb3:off fbmem=32M

NTSC square pixel (table 80 of adv7393 datasheet)
setenv vidargs video=mxcfb0:dev=lcd,640x480M@30,if=RGB24 video=mxcfb1:off video=mxcfb2:off video=mxcfb3:off fbmem=32M

But i don’t know if it’s possible to have NTSC/PAL format in the 525i/625i format (table 63 of adv7393 datasheet). You say that apalis don’t have interlaced mode. So maybe i need to use a trick.

I’m a little confuse and need help .

I found this :

but this is for colibri and using the chrontel chip that i can not buy.

In the CH7022 datasheet

  • NTSC-M 60/1.001 858x525 Interlaced
  • PAL-B/D/G/H/I 50 864x625 Interlaced

or

  • 480/60p SMPTE293MEIA770.2A 60/1.001 858x525 720x480 27 Progressive
  • 576/50p ITU-R BT1358 50 864x625 720x576 27 Progressive

which one do you use? the ADV7393 don’t take the 480p and 576p…

Hi Andrija,

Thanks you for the quick reply.

Like you, i prefer your first solution.
As i understand it, the interlacing could be done by the IMX6 and that’s what i want.

So, what do you think of keeping the AD723 on the vga? For me it’s the same work.

Could you help me for the kernel patch?
because the post for the post is old “23 avr. 2014”

Thanks Max!

I’ve already try to compile the kernel from source.
If i change nothing that works great. But when i want to change it, that make some bug…

I will try again with these patch.
Do you have the patch with VGA interface interlaced?

Regards

EDIT 1 : I have to put the 4 patches? from 1 to 4?

EDIT 2 : I found this in the mxc_vdacif.c

        /* 12 1024x768i-43 VESA */
	{ NULL, 43, 1024, 768, 22271, 56, 8, 41, 0, 176, 8,
	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT | FB_SYNC_OE_LOW_ACT,
	  FB_VMODE_INTERLACED, FB_MODE_IS_VESA },

So VGA already support the interlaced mode?
I just have to had in mxc_vdacif.c (values correspond to patch 0003-imx6-LCD-interface-xxxxx):

+	/* PAL 720x576i @ 50 Hz , pixel clk @ 13.5MHz */
{ NULL, 50, 720, 576, 74074, 138, 24, 39, 4, 126, 6,
	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT | FB_SYNC_OE_LOW_ACT,
	  FB_VMODE_INTERLACED, FB_MODE_IS_VESA },
+	/* NTSC 720x480i @ 60 Hz , pixel clk @ 13.5MHz */
{ NULL, 60, 720, 480, 74074, 114, 38, 31, 8, 124, 6,
	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT | FB_SYNC_OE_LOW_ACT,
	  FB_VMODE_INTERLACED, FB_MODE_IS_VESA },

I don’t understand why NTSC and PAL have the same pixel clock in the patch comment. Any idea?

Last question, If i just add these lign, that not enough. I have to tell somewhere that the definition (720x480i) correpond to this index …

Edit 08-10-2018 : do you see anything wrong in my proposal? I just make the change before the
make apalis_imx6_defconfig command

Hi,

I’ve a problem with my kernel generation…

The output video work good but i lost my video input…
I’m using the Analogue Camera Adapter - Toradex Evaluation Board
When i use the kernel from here Index of /Colibri/Linux/Images
it’s ok.

But when i compile my kernel (with or without patch) i have this error in gstreamer :

root@apalis-imx6:~# gst-launch-1.0 -v imxv4l2videosrc ! autovideosink
Setting pipeline to PAUSED ...
display(/dev/fb0) resolution is (720x576).
====== OVERLAYSINK: 4.1.4 build [   27.675523] mxc_v4l2_output v4l2_out: Bypass IC.
on Oct  5 2017 04:46:09. ======
[   27.681795] mxc_v4l2_output v4l2_out: Bypass IC.
display(/dev/fb0) resolution is (720x576).
display(/dev/fb0) resolution is (720x576).
ERROR: Pipeline doesn't want to pause.
ERROR: from element /GstPipeline:pipeline0/GstImxV4l2VideoSrc:imxv4l2videosrc0: GStreamer error: state change failed and some element failed to post a proper error message with the reason for the failure.
Additional debug info:
../../../../gstreamer-1.8.3/libs/gst/base/gstbasesrc.c(3354): gst_base_src_start (): /GstPipeline:pipeline0/GstImxV4l2VideoSrc:imxv4l2videosrc0:
Failed to start
Setting pipeline to NULL ...
Freeing pipeline ...

Thats how i build my kernel

adv@adv-VirtualBox:~$ 
adv@adv-VirtualBox:~$ git clone -b toradex_4.9-1.0.x-imx git://git.toradex.com/linux-toradex.git
Cloning into 'linux-toradex'...
remote: Counting objects: 7476280, done.
remote: Compressing objects: 100% (1157868/1157868), done.
remote: Total 7476280 (delta 6319067), reused 7423370 (delta 6266627)
Receiving objects: 100% (7476280/7476280), 1.52 GiB | 772.00 KiB/s, done.
Resolving deltas: 100% (6319067/6319067), done.
Checking connectivity... done.
Checking out files: 100% (57025/57025), done.
adv@adv-VirtualBox:~$ cd linux-toradex/
adv@adv-VirtualBox:~/linux-toradex$ make apalis_imx6_defconfig
  HOSTCC  scripts/basic/fixdep
  HOSTCC  scripts/kconfig/conf.o
  SHIPPED scripts/kconfig/zconf.tab.c
  SHIPPED scripts/kconfig/zconf.lex.c
  SHIPPED scripts/kconfig/zconf.hash.c
  HOSTCC  scripts/kconfig/zconf.tab.o
  HOSTLD  scripts/kconfig/conf
#
# configuration written to .config
#
adv@adv-VirtualBox:~/linux-toradex$ make -j3 uImage LOADADDR=10008000 2>&1 | tee build.log
scripts/kconfig/conf  --silentoldconfig Kconfig
…
  Kernel: arch/arm/boot/zImage is ready
  UIMAGE  arch/arm/boot/uImage
Image Name:   Linux-4.9.87
Created:      Fri Oct 12 06:59:17 2018
Image Type:   ARM Linux Kernel Image (uncompressed)
Data Size:    5498088 Bytes = 5369.23 KiB = 5.24 MiB
Load Address: 10008000
Entry Point:  10008000
  Kernel: arch/arm/boot/uImage is ready
adv@adv-VirtualBox:~/linux-toradex$ make imx6q-apalis-eval.dtb
  DTC     arch/arm/boot/dts/imx6q-apalis-eval.dtb
adv@adv-VirtualBox:~/linux-toradex$ cp ~/linux-toradex/arch/arm/boot/uImage /media/sf_
sf_I_DRIVE  sf_partage/ 
adv@adv-VirtualBox:~/linux-toradex$ cp ~/linux-toradex/arch/arm/boot/uImage /media/sf_
sf_I_DRIVE  sf_partage/ 
adv@adv-VirtualBox:~/linux-toradex$ cp ~/linux-toradex/arch/arm/boot/uImage /media/sf_partage/

adv@adv-VirtualBox:~/linux-toradex$ cp ~/linux-toradex/arch/arm/boot/dts/imx6q-apalis-eval.dtb /media/sf_partage/

with crosscompilation enabled by

 . /usr/local/oecore-x86_64/environment-setup-armv7at2hf-neon-angstrom-linux-gnueabi

Any idea?

EDIT 12-10-2018 :
I change my toolchain with
export ARCH=arm
export PATH=~/gcc-linaro/bin/:$PATH
export CROSS_COMPILE=arm-linux-gnueabihf-

But the result is the same…
For information only the last command work and i have interlaced video in output.

gst-launch-1.0  -v imxv4l2videosrc ! autovideosink
gst-launch-1.0  -v imxv4l2videosrc ! imxipuvideosink

gst-launch-1.0 -v videotestsrc ! autovideosink
gst-launch-1.0 -v videotestsrc ! imxipuvideosink use-vsync=true

ok, i’ll do that

Thanks very much.