i.MX8QM Power Management

I’m attempting to do some preliminary testing of the power management capabilities of the iMX8QM SoM, but so far the system (as a whole, including the Apalis Evaluation board with nothing plugged into it except a USB serial cable and a power supply) seems to consume 8-8.5W, even when I disable the second GPU in the device-tree, disable all but CPU core 0 via sysfs, and let core 0 idle using the schedutil cpufreq governor.

Is power management still a work in progress, or is there more I can do that I’m not aware of?


I’ve done some additional testing by measuring the current of the Vcc voltage rail as seen from JP4 on the Apalis Evaluation board.

Methodology: R15, R16, R17, R19, R20, R21 were replaced with 0.2Ω resistors and the voltage across JP4 was used to calculate the total power on the Vcc rail.


CPU 0-5 on, system idle, schedutil governor, GPUs enabled: 58.0mV on JP4 → ~4.7W

CPU 0-3 on, system idle, schedutil governor, GPUs enabled: 56.0mV on JP4 → ~4.6W

CPU 0 on, system idle, schedutil governor, GPUS enabled: 54.5mV on JP4 → ~4.5W

By all means without questioning your higher motives what we are talking about is in early access featuring alpha silicon and somewhat matching not fully integrated and already rather outdated software. I really don’t think this will produce any much meaningful numbers at this point, sorry.

I was afraid you would say something like that :slight_smile:
Is there any sense at all of what kind of power draw we can expect to see on production units? Even rough estimates will help me a lot. My company’s target use is a battery powered handheld piece of scientific equipment, so idle power consumption could mean the difference between going with the iMX8 or something else.

Hi @dwlockhart,
Unfortunately, there is currently not much more I can tell you. Your measurement results seem to be very feasible. Our own idle measurements with a 1080p HDMI monitor plugged in showed a consumption of around 5.5W in idle.

As Marcel wrote, the module is currently running with alpha silicon which still has many bugs. The current BSP has not been optimized for reducing the power consumption. We are waiting for the final silicon for tweaking the consumption.

It is currently not easy to estimate the final power consumption of the module . NXP still does not provide any official numbers.

We did some preliminary power measurements, see the following post for details: