How to run BareMetal apps on Verdin IMX95?

Technical Support
1

Hi,

I got a Verdin IMX95 SOM on a Dahlia base board. I want to run and debug bare-metal apps on at least one of the cores. I’ve been following the “Real-time Edge Software User Guide” from NXP to compile the hello_world+FreeRTOS example for the IMX95 from their “nxp-real-time-edga-sw” repository and verfied that the images were built. How can I run and debug these images using the Toradex boards?

The steps given in section 3.7.4 of the mentioned documentation do not work because the Toradex uboot doesn’t have the required commands built in. The steps given in section 3.7.5 do not work because none of the Toradex Linux based distributions have the correct device tree or a device tree compiler installed.

Is there any documentation from Toradex on how to run and debug bare-metal apps?

Thanks

2

Hi, I’m the Toradex AI Assistant.

I might make mistakes or occasionally get you wrong. Our support team will step in if needed.

I don’t have specific documentation for bare-metal application debugging on the Verdin iMX95 SOM in the available sources. However, I can provide some relevant information about JTAG debugging and device tree customization that may be helpful for your setup.

JTAG Debugging Support

Toradex provides JTAG debugging support for Cortex-M cores on several modules (1). The documentation shows support for:

  • Apalis iMX8 with Apalis Evaluation Board (1)
  • Colibri iMX7 and Colibri iMX8X with Colibri Evaluation Board (1)
  • Verdin iMX8M Mini and Verdin iMX8M Plus with Verdin Development Board or Dahlia carrier board (1)

Hardware and Software Requirements

For JTAG debugging, you’ll need (1):

Hardware Requirements

  • Toradex Evaluation Board, Development Board or Dahlia Board (1)
  • J-Link hardware from Segger (the guide uses hardware version v10.1) (1)

Software Requirements

  • JLinkGDBServer from Segger website (1)
  • GCC Toolchain as described in the MCUXpresso SDK setup (1)

Device Tree Customization

Since you mentioned device tree issues, Toradex provides comprehensive documentation on device tree customization (2). You can:

  1. Create custom device trees by copying and modifying existing ones (2)
  2. Compile device trees using the Device Tree Compiler (dtc) tool (2)
  3. Deploy device trees to both static images and running devices (2)

For compilation, you can use (2):

$ make DTC_FLAGS="-@" freescale/<custom-device-tree>.dtb

Dahlia Carrier Board

The Dahlia Carrier Board datasheet is available (3), which should provide the necessary hardware interface information for your setup.

Recommendation

Since the available sources don’t contain specific documentation for Verdin iMX95 bare-metal debugging, I’d recommend checking if there are additional Toradex resources specifically for the iMX95 platform, as this appears to be a newer module that may not be fully covered in the current JTAG debugging documentation.

The general JTAG debugging workflow and device tree customization principles should still apply, but you may need platform-specific configuration details for the iMX95.

Best regards, Toradex AI Assistant.

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3

I’m interested in using one of the A55 cores.

4

@ToradexAI Where can I find documentation about how to start a debug session in the Verdin IMX95 module?

5

I don’t have specific documentation for debugging A55 cores on the Verdin iMX95 in the available sources. The current JTAG debugging documentation focuses on Cortex-M cores rather than Cortex-A cores (1).

Available JTAG Documentation

The existing Cortex-M JTAG debugging documentation covers (1):

  • Supported hardware: Dahlia Carrier Board uses connector X8 for JTAG (1)
  • Required tools: J-Link hardware from Segger and JLinkGDBServer (1)
  • Important hardware note: If using an external JTAG debugger with Dahlia Carrier Board, jumper JP6 should be connected (1)

Verdin iMX95 Current Status

The Verdin iMX95 documentation indicates this is a newer module (2):

  • Features 6x ARM Cortex-A55 cores plus ARM Cortex-M7 and ARM Cortex-M33 cores (3)
  • The documentation page states it’s “currently under development” with full content coming soon (2)
  • Software support: Both Yocto Project Reference Images and Torizon OS support for Verdin iMX95 “will be announced soon” (2)

Community Insights

From community discussions about similar modules, the JTAG interface typically connects to the SoC debug interface, potentially allowing access to both Cortex-A and Cortex-M cores, with core selection managed through debugger software configuration (4).

Current Limitation

The available sources don’t contain specific documentation for debugging Cortex-A55 cores on the Verdin iMX95. Since this module appears to be in early stages with documentation still being developed, the A55 debugging procedures may not yet be documented in the current Toradex resources.

You may need to wait for updated documentation specifically covering the iMX95 platform, or explore whether standard ARM Cortex-A debugging procedures can be adapted for your use case.

Best regards, Toradex AI Assistant.

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If I answered your question, please tick the “Solution” checkbox.

For follow-up questions to me, please use @ToradexAI in your post.

6

@ToradexAI I can’t get it to work. Is there any support by a human available?

7

Human Support Options

Yes, Toradex offers multiple human support channels (1):

Phone Support

Multiple office locations with dedicated phone support (1):

  • Seattle - USA: +1 206 452 2031
  • Campinas - Brazil: +55 19 3327 3732
  • Horw - Switzerland: +41 41 500 4800
  • Bangalore - India: +91 80 4111 9096
  • Shanghai - China: +86 21 54380582
  • Japan: +81 50 3134 4663

Paid Customized Support

For more specialized assistance (1):

One-on-One Consulting

  • Custom Training
  • Integration with existing tools and processes
  • Proof of Concept, Proof of Value
  • Reviews, Best Practices Check
  • And more

Custom Hardware Support

  • Support for running Torizon on custom hardware
  • Board ports and maintenance for ARM, x86-64, and RISC-V platforms

Community Support

The Toradex community forum where you’re currently posting is also an active support channel with both community members and Toradex staff participating.

Given that you’re working with the Verdin iMX95 (which is a newer module) and need specific bare-metal debugging support for A55 cores, the One-on-One Consulting option might be particularly helpful since this appears to require specialized knowledge that may not yet be fully documented.

Best regards, Toradex AI Assistant.

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If I answered your question, please tick the “Solution” checkbox.

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8

Hello @doespaddel,

We have not tried or explicitly enabled this use case.
Therefore, to apply it, some work would be needed.

From what I understand, some changes to u-boot and the Linux Device tree would be needed.
It is also possible that the System Manager would need to properly allocate one of the A55 cores to be ran independently.

As we don’t have instructions for building u-boot from source code for the Verdin iMX95, modifying u-boot and generating an image with Yocto would be a way to go: Build with Yocto Documentation Overview | Toradex Developer Center
When it comes to device tree modifications, we have a lot of documentation on this topic: First Steps with Device Trees | Toradex Developer Center

In general, I think a good way to go is to look into what is done differently in NXP’s example and try to apply it as customizations to the BSP we provide.

Best Regards,
Bruno

9

Thanks for your reply, @bruno.tx

we discussed our options internally and unfortunately, building our own images seem to require more time and effort than we are able to invest at the moment. Especially given the fact that we can’t get hold of a datasheet for the processor or the BSP from NXP at this time. Thank you for your help.

Best regards,
Florian

10

Hello @doespaddel,

Regarding the u-boot branch, the correct one for the Verdin iMX95 on Toradex BSP 7 would be toradex_imx_lf_v2024.04.

I think the iMX95 datasheet and reference manual are still under the early access program.
We can help you get access to it. NDAs are required and there is some bureaucracy involved but many of our customer have gone through this process already.
We even have a page on the process needed for NXPs NDA here: Sign an NDA with NXP | Toradex Developer Center

Regardless, we will reach out via email to talk about this some more, maybe we can help to unblock this issue.

Best Regards,
Bruno