How to link code to DDR (start address 0x80000000) on Cortex M4 side of imx7s?

I modified file "MCIMX7D_M4_ddr.ld " as follow:

MEMORY
{
  m_interrupts          (RX)  : ORIGIN = 0x9ff00000, LENGTH = 0x00000240
  m_text                   (RX)  : ORIGIN = 0x9ff00240, LENGTH = 0x00017DC0
  m_data		       (RW)  : ORIGIN = 0x81000000, LENGTH = 0x0000FFFF
}

there is no error when I compile the code, but the process can not start up when I load the binary file to 0x80000000 on uboot. I load file as follow:

........
.........
Net:   FEC0
Normal Boot
Hit any key to stop autoboot:  0 
Colibri iMX7 # loadb 0x910000
 Ready for binary (kermit) download to 0x00910000 at 115200 bps...
Starting kermit transfer.  Press Ctrl+C to cancel.
Transferring 05160006.bin...
  100%      67 KB       8 KB/sec    00:00:08       0 Errors  
 Total Size      = 0x00010f08 = 69384 Bytes
 Start Addr      = 0x00910000
Colibri iMX7 # dcache flush 
Colibri iMX7 # bootaux 0x910000
Starting auxiliary core at 0x00910000 ...

So, what is wrong with it ?

For ‘MCIMX7D_M4_ddr.ld’, you can keep it like this:

/* Specify the memory areas */
MEMORY
{
  m_interrupts          (RX)  : ORIGIN = 0x1ff00000, LENGTH = 0x00000240
  m_text                (RX)  : ORIGIN = 0x1ff00240, LENGTH = 0x0007FDC0
  m_data                (RW)  : ORIGIN = 0x8ff80000, LENGTH = 0x00070000
}

Load firmware from uboot:

Colibri iMX7 # tftp 0x8ff00000 hello_world_ddr.bin    
Colibri iMX7 # dcache flush
Colibri iMX7 # bootaux 0x8ff00000

When you link the binary to 0x9ff00000, you also need to load it to that place… But 0x9ff00000 is actually not a valid DDR memory address since it is beyond the 256MB of RAM provided by the Colibri iMX7S. Please use the address setup as suggested by @benjamin.tx in the answer.

The default MCIMX7D_M4_ddr.ld reserves 0x8ff0_0000~0x8ffeffff(960KB) for data and text segments of M4 firmware. And 0x8fff_000~0x8fff_ffff(64KB) is for rpmsg. It is okay for iMX7S as just the last 1MB of 256MB DDR is reserved from Linux. For iMX7D, the DDR ram is 512MB. The default MCIMX7D_M4_ddr.ld and rpmsg configuration will reserver 1MB in the middle of entire 512MB DDR RAM. Is it okay for iMX7D ? And device tree should be"

memory{
 reg = <0x80000000 0x20000000>;
 linux,usable-memory = <0x80000000 0xff00000>;
 linux,usable-memory = <0x90000000 0x10000000>;
 }

Or should it be moved to 0x9ff0_0000 as well as rpmsg ?

It is okay for the iMX7D to have the carve-out in the middle.

With U-Boot 2016.11 (the 2.7 releases) there is no need to add the usable-memory manually in the device tree, U-Boot will mark the memory as used automatically depending on whether the M4 is running or not, see: board: colibri_imx7: reserve DDR memory for Cortex-M4.