How to configure IMX8QXP_SAI1_RXC_LSIO_GPIO0_IO30 pin as external interrupt for Cortex M4

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1

Dear @alex.tx

Can you please help us regarding below issue:
I have used IMX8QXP_SAI1_RXC_LSIO_GPIO0_IO30 as SPI external interrupt for M4.
When I run only M4 the interrupt gets generated.
but when used along with Linux the interrupt is not generated (as soon as Linux boots the interrupt stops).

Can you please provide us any device tree configuration if required.

Thank you

2

Hi, I’m the Toradex AI Assistant. I’m in early beta, and I would appreciate your feedback.
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Hello,

To address the issue where the MX8QXP_SAI1_RXC_LSIO_GPIO0_IO30 pin used as an SPI external interrupt for the Cortex-M4 stops generating interrupts when Linux boots, you need to ensure that Linux does not claim this GPIO for its own use, thereby preventing the M4 from receiving interrupts.

This can be achieved by modifying the Device Tree within the Linux source to disable or reconfigure the pin so it’s not used by Linux, allowing the M4 to exclusively manage it. Here’s a step-by-step guide on how to proceed:

  1. Identify the Device Tree Blob (DTB) used by Linux for your board. This information can usually be found in the U-Boot environment variables or by examining the boot log.

  2. Locate the Device Tree Source (DTS) file corresponding to your DTB. This file is part of the Linux source code. For the i.MX8QXP, the DTS files are typically located in arch/arm64/boot/dts/freescale/.

  3. Edit the DTS file to disable the GPIO pin for Linux use. You will need to find the section of the Device Tree that configures the LSIO_GPIO0_IO30 pin and modify it. This could involve setting the status of the pin to “disabled” or removing the pin from a pinctrl group that is claimed by a Linux driver.

    For example, to disable the pin, you might add or modify a node like this:

    &lsio_gpio0 {
    pinctrl-0 = <&pinctrl_gpio0>;
    status = "okay";

    pinctrl_gpio0: gpio0grp {
        fsl,pins = <
            /* Other pin configurations here */
            MX8QXP_SAI1_RXC_LSIO_GPIO0_IO30_DISABLED 0x00000000 /* Example pin configuration to disable */
        >;
    };
};

    Note: The exact syntax and node names (&lsio_gpio0, pinctrl_gpio0, etc.) depend on the specific Device Tree structure for your board and SoC. The example above is illustrative and may not directly apply to your setup.

  4. Recompile the Device Tree. After modifying the DTS file, you need to compile it into a DTB file using the Device Tree Compiler (dtc). The command might look something like this:

Please, also check if these links can help you solve your problem:

Running FreeRTOS on the Cortex-M4 of a Colibri iMX7 | Toradex Developer Center.

3

Hi @NirajS ,
As suggested by our Toradex AI, please check in the device tree if this pin is already used .
I can see in the device tree, this pin IMX8QXP_SAI1_RXC_LSIO_GPIO0_IO30 is used in UART_A pins.
Please check pinctrl_lpuart3_ctrl node in imx8x-colibri.dtsi.