Hi,
I’m trying to build the MCC pingpong example available at http://repository.timesys.com/buildsources/m/mcc-pingpong/mcc-pingpong-1.0. I’m using toradex-linux at branch toradex_vf_4.1-next and Colibri_VF_LinuxConsoleImageV2.5_20151216.
The first problem is with the files included in pingpong.c
#include <linux/mcc_config.h>
#include <linux/mcc_common.h>
#include <mcc_api.h>
#include <linux/mcc_linux.h>
Do I need to copy these files to toradex-linux kernel folder or provide the headers inside the application folder?
The second problem is that my Makefile can’t link with libmcc? My Makefile is:
###############################################################################
# Setup build environment
###############################################################################
# Set the prefix for the cross compiler
CROSS_COMPILE ?= arm-linux-gnueabihf-
# Set path to the target libraries
OECORE_TARGET_KERNEL ?= ../../linux-toradex/
OECORE_TARGET_SYSROOT ?= /srv/nfs/rootfs/
###############################################################################
# Setup project settings
###############################################################################
SRC = ./src/pingpong.c
INC += -I./src
PROG = mcc-pingpong
LIBS += -lmcc
# Set flags to the compiler and linker
ARCH_CFLAGS = -march=armv7-a -fno-tree-vectorize -mthumb-interwork \
-mfloat-abi=hard -mtune=cortex-a5
CFLAGS = -O0 -g -Wall $(INC) $(ARCH_CFLAGS)
LDFLAGS = -L$(OECORE_TARGET_SYSROOT)usr/lib \
-Wl,-rpath-link,$(OECORE_TARGET_SYSROOT)usr/lib \
-L$(OECORE_TARGET_SYSROOT)lib \
-Wl,-rpath-link,$(OECORE_TARGET_SYSROOT)lib
###############################################################################
# This section of Makefile usually needs no change
###############################################################################
# Toochain binaries
CC = $(CROSS_COMPILE)gcc
LD = $(CROSS_COMPILE)gcc
STRIP = $(CROSS_COMPILE)strip
RM = rm -rf
# Sets the output filename and objects files
PROG := $(PROG)
OBJS = $(SRCS:.c=.o)
DEPS = $(OBJS:.o=.o.d)
-include $(DEPS)
all: $(PROG)
$(PROG): $(OBJS) Makefile
$(CC) $(CFLAGS) -o $@ $(OBJS) $(LIBS) $(LDFLAGS)
# $(STRIP) $@
%.O: %.C
$(CC) -c $(CFLAGS) -O $@ $<
$(CC) -MM $(CFLAGS) $< > $@.d
clean:
$(RM) $(DEPS) $(OBJS) $(PROG)
Can anyone help me?