I am facing a strange issue with a WinStar WF70A8TYAHLNT0# display connected to a native LVDS interface of Verdin imx8mp.
Native resolution of the display shall be 1024x600, but when I start the panel, display covers only 2/3 of the screen, picture seems to be shrunken vertically.
When I change panel-timing in my custom device tree overlay and adjust hactive from 1024 to 1440, display covers entire screen area, as if the display resolution was actually 1440x600. But the picture doesn’t look sharp.
It seems to me that there might be some issue with some clock signal, but the issue is related only to columns, rows are displayed correctly. Do you have any idea, what could be wrong? Or any suggestion on what to check?
Thank you!
Best Regards,
Jaroslav
Notes:
I already tried the fix for LVDS issue, removing lines form imx8mp-ldb.c, but it has no effect.
Tezi 6.4.0, device tree is based on imx8mp-verdin-wifi-dev.dts, with hdmi overlays disabled.
My overlay (only changes related to the LVDS display).
/* WF70A8TYAHLNT0 panel with a resolution of 1024x600 */
/dts-v1/;
/plugin/;
&panel_lvds {
status = "okay";
data-mapping = "vesa-24";
width-mm = <154>;
height-mm = <86>;
panel-timing {
/* Clock-frequency 51.2 Mhz is not supported by Verdin source code, so I selected 51609600 Hz which still requires minor source code changes in drivers/gpu/drm/imx/imx8mp-ldb.c*/
clock-frequency = <51609600>;
hactive = <1024>;
vactive = <600>;
hsync-len = <70>;
hfront-porch = <160>;
hback-porch = <90>;
vsync-len = <11>;
vfront-porch = <12>;
vback-porch = <12>;
de-active = <1>;
hsync-active = <0>;
vsync-active = <0>;
};
port {
panel_lvds_native_in: endpoint {
remote-endpoint = <&lvds_out>;
};
};
};
&lvds_out{
remote-endpoint = <&panel_lvds_native_in>;
};
&lcdif2 {
status = "okay";
};
&ldb {
status = "okay";
};
&ldb_phy {
status = "okay";
};
&gpu_2d {
status = "okay";
};
&gpu_3d {
status = "okay";
};
&mix_gpu_ml {
status = "okay";
};
&ml_vipsi {
status = "okay";
};
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Hi Jaroslav,
It sounds like you’re experiencing an issue with the horizontal timing parameters of your LVDS display. Here are a few suggestions to help you troubleshoot and potentially resolve the issue:
Clock Frequency: Ensure that the clock frequency you are using is correct and supported by both the display and the Verdin iMX8MP. You mentioned that 51.2 MHz is not supported, and you selected 51.6096 MHz. Verify that this frequency is within the tolerance range of your display.
Horizontal Timing Parameters: The horizontal timing parameters (hsync-len, hfront-porch, hback-porch) are crucial for proper display operation. Double-check the datasheet of the WinStar WF70A8TYAHLNT0# display to ensure these values are correct. Sometimes, incorrect timing parameters can cause the display to not cover the entire screen or appear shrunken.
Device Tree Overlay: Your device tree overlay looks mostly correct, but you might want to experiment with slight adjustments to the horizontal timing parameters. For example, try increasing or decreasing the hfront-porch and hback-porch values slightly to see if it affects the display output.
Driver Modifications: Since you mentioned making changes to the imx8mp-ldb.c file, ensure that these changes are correctly implemented and do not introduce any timing issues. Sometimes, minor changes in the driver can have significant impacts on the display output.
Testing with Known Good Configuration: If possible, test your display with a known good configuration or another display to isolate whether the issue is with the display, the device tree configuration, or the driver.
Contact Technical Support: If the issue persists, consider reaching out to Toradex technical support for further assistance. They might have more insights or specific patches for the Verdin iMX8MP and your display.
Here is a slightly adjusted version of your device tree overlay with minor changes to the horizontal timing parameters:
/* WF70A8TYAHLNT0 panel with a resolution of 1024x600 */
/dts-v1/;
/plugin/;
&panel_lvds {
status = "okay";
data-mapping = "vesa-24";
width-mm = <154>;
height-mm = <86>;
panel-timing {
clock-frequency = <51609600>;
hactive = <1024>;
vactive = <600>;
hsync-len = <70>;
hfront-porch = <150>; // Adjusted value
hback-porch = <100>; // Adjusted value
vsync-len = <11>;
vfront-porch = <12>;
vback-porch = <12>;
de-active = <1>;
hsync-active = <0>;
vsync-active = <0>;
};
port {
panel_lvds_native_in: endpoint {
remote-endpoint = <&lvds_out>;
};
};
};
&lvds_out{
remote-endpoint = <&panel_lvds_native_in>;
};
&lcdif2 {
status = "okay";
};
&ldb {
status = "okay";
};
&ldb_phy {
status = "okay";
};
&gpu_2d {
status = "okay";
};
&gpu_3d {
status = "okay";
};
&mix_gpu_ml {
status = "okay";
};
&ml_vipsi {
status = "okay";
};
Try these adjustments and see if they help resolve the issue. If not, further investigation into the clock signal and timing parameters might be necessary.
Best Regards,
[Your Name]
Please, also check if these links can help you solve your problem:
This issue is often related to display timings. I’ve tried to find the timings of this display, but they were not present in its datasheet on the WinStar website.
Could you tell me where you find the timings to write the device tree? Or, if it is possible, could you send me a datasheet with the timings, please?
Thank you for a quick response. Timings shall be correct. I have attached the datasheet (datasheet is for the same display, but without touch control).
Maybe the issue is with how I applied LVDS fix. I am using torizoncore-builder to build the image (commands build, unpack and deploy). I modified the file drivers/gpu/drm/imx/imx8mp-ldb.c in linux folder within folder ~/tcbdir, following guide customizing torizoncore images.
Is the change in source file imx8mp-ldb.c included in build when running “torizoncore-builder build” commmand based on image torizon-core-docker-verdin-imx8mp-Tezi_6.7.0+build.18.tar (in the meanwhile I switched to 6.7.0)? Or do have have to run the full kernel build using bitbake to include change in imx8mp-ldb.c source file to kernel?
I really think the issue may be in clock-frequency, as
sudo cat /sys/kernel/debug/clk/clk_summary | grep -C 5 video
returns:
dram_pll 1 1 0 1000000000 0 0 50000 Y
dram_pll_bypass 1 1 0 1000000000 0 0 50000 Y
dram_pll_out 1 1 0 1000000000 0 0 50000 Y
dram_core_clk 2 2 0 1000000000 0 0 50000 Y
dram1_root_clk 1 1 0 1000000000 0 0 50000 Y
video_pll1_ref_sel 1 1 0 24000000 0 0 50000 Y
video_pll1 1 1 0 361267200 0 0 50000 Y
video_pll1_bypass 1 1 0 361267200 0 0 50000 Y
video_pll1_out 2 2 0 361267200 0 0 50000 Y
media_disp2_pix 1 1 0 72253440 0 0 50000 Y
media_disp2_pix_root_clk 1 1 0 72253440 0 0 50000 Y
lcdif2_pixel_clk 1 1 0 72253440 0 0 50000 Y
media_ldb 1 1 0 361267200 0 0 50000 Y
media_ldb_root_clk 1 1 0 361267200 0 0 50000 Y
What is strange to me is that lcdif2_pixel_clk is media_ldb_root_clk/5. Based on what I read, I would expect media_ldb_root_clk/7.
Could you test the LVDS display without modifying the driver? I would recommend modifying this driver only in case it is mandatory, so in my opinion, it would be reasonable to test it without the modifications.
About the build with TCB, I verified the kernel, and this driver is built-in, so TCB can’t change or update it. If you need to modify it, you will need to build the kernel with the changes using Yocto. Please, refer to this article to see how you can do it.
I have tested the LVDS display again without modifying the driver in any way and it works!
As expected it forces frequency 74.25 MHz, even though I set pixel-clock to 51.6 Mhz.
sudo cat /sys/kernel/debug/clk/clk_summary | grep -C 5 video
returns:
video_pll1_ref_sel 1 1 0 24000000 0 0 50000 Y
video_pll1 1 1 0 1039500000 0 0 50000 Y
video_pll1_bypass 1 1 0 1039500000 0 0 50000 Y
video_pll1_out 2 2 0 1039500000 0 0 50000 Y
media_disp2_pix 1 1 0 74250000 0 0 50000 Y
media_disp2_pix_root_clk 1 1 0 74250000 0 0 50000 Y
lcdif2_pixel_clk 1 1 0 74250000 0 0 50000 Y
media_ldb 1 1 0 519750000 0 0 50000 Y
media_ldb_root_clk 1 1 0 519750000 0 0 50000 Y
I believe the issue was, that TCB build included my change in imx8mp.dtsi from step 2 of LVDS clock fix, but it did not include a change done in imx8mp-ldb.c from step 1 (as you explained this file has to be built by a full Yocto build).
Display runs a bit above display documented max frequency 67.2 Mhz, but now I know that if any issues pop up, I need to adjust the driver imx8mp-ldb.c and do the full Yocto build.
Take the build result .tar file from build result folder deploy\images\verdin-imx8mp, in my case torizon-core-docker-verdin-imx8mp-Tezi_6.8.0-devel-20241002101920+build.0 and place it into ~/tcbdir folder. Specify it as a local source in tcbuild.yaml.
Adjust imx8mp.dtsi according to LVDS clock fix (this change is included in TCB build) and device tree as needed.
