GPT register access from M4 blocks Linux

Hi all,

Problem solved !
It appeared to be the same problem as this post.
In short, as I mentioned, I assigned the System PLL PFD0 clock to the GPT peripheral and this clock seems be be modified by the Linux SHDC driver.

Assigning ccmRootmuxGptOsc24m did the trick and my output pulse is now working all the time, even when accessing the GPT4 registers.

Jeroen

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