GPIO Registers for Colibri Imx8x

Technical Support
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1

I am looking through the device tree code for the colibri-imx8x kernel.

The GPIO pins are initialized with specific register values. Is there any documentation that can help me map out what the bits in the gpio registers mean?

	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
		fsl,pins = <IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK			0x06000041>,	/* SODIMM  47 */
			   <IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD			0x21>,		/* SODIMM 190 */
			   <IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0		0x21>,		/* SODIMM 192 */
			   <IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1		0x21>,		/* SODIMM  49 */
			   <IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2		0x21>,		/* SODIMM  51 */
			   <IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3		0x21>,		/* SODIMM  53 */
			   <IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT		0x21>;
2

hey @nmohan86,

These values can be found in the NXP Applications Manual for your specific SoC. For the Colibri imx8x, you would be looking for the iMX 8DualX/8DualXPlus/8QuadXPlus Applications Processor Reference Manual or Document Number IMX8DQXPRM.

You’ll have to make an NXP account and agree to some terms before downloading (should be ~ instant).

This link may work. https://www.nxp.com/webapp/sps/download/preDownload.jsp?render=true

But you can also go to:

i.MX 8 Series Applications Processors | Arm® Cortex®-A72/A53/A35/M4 cores | NXP Semiconductors

click on IMX 8X → Reference Manual button → IMX 8DualXPlus/8QuadPlus Applications Processor Reference Manual. (download page)

-Eric

3

That helps! Thank you !

4

Please be aware that all modifications to the pinmuxing of the iMX8 SoC are made through the i.MX 8 System Controller Firmware. Direct access to pinmux configuration registers is blocked