Hi,
I want to write a little program for the M4 to toggle a GPIO with a specific (selectable) frequency. The manual points out that i should disable a whole GPIO bank in the device tree to give the M4 full access. Do i always need to do so or just when i want to use interrupt mode? Maybe there is a little demo which works out of the box for my setup? I am using a MX7D on a Viola board.
Thanks!
Or maybe there is a way to disable a gpio bank by a kernel boot argument? Like with the uarts?
Or maybe there is a way to disable a gpio bank by a kernel boot argument? Like with the uarts?
Yes the u-boot fdt_fixup environment variable can be set to disable the gpio node as well. Something like below should disable first gpio bank.
Colibri iMX7 # setenv fdt_fixup 'fdt addr ${fdt_addr_r} && fdt rm /soc/aips-bus@30000000/gpio@30200000'
Also see below for an idea of how you may traverse the tree from u-boot.
Colibri iMX7 # ubi part ubi
ubi0: default fastmap pool size: 200
ubi0: default fastmap WL pool size: 100
ubi0: attaching mtd1
ubi0: attached by fastmap
ubi0: fastmap pool size: 200
ubi0: fastmap WL pool size: 100
ubi0: attached mtd1 (name "mtd=4", size 508 MiB)
ubi0: PEB size: 131072 bytes (128 KiB), LEB size: 126976 bytes
ubi0: min./max. I/O unit sizes: 2048/2048, sub-page size 2048
ubi0: VID header offset: 2048 (aligned 2048), data offset: 4096
ubi0: good PEBs: 4060, bad PEBs: 4, corrupted PEBs: 0
ubi0: user volume: 4, internal volumes: 1, max. volumes count: 128
ubi0: max/mean erase counter: 92/20, WL threshold: 4096, image sequence number: 0
ubi0: available PEBs: 0, total reserved PEBs: 4060, PEBs reserved for bad PEB handling: 76
Colibri iMX7 # ubi read ${fdt_addr_r} dtb
Read 0 bytes from volume dtb to 82000000
No size specified -> Using max size (43596)
Colibri iMX7 # fdt addr ${fdt_addr_r}
Colibri iMX7 # fdt list
/ {
#address-cells = <0x00000001>;
#size-cells = <0x00000001>;
model = "Toradex Colibri iMX7D on Colibri Evaluation Board V3";
compatible = "toradex,colibri_imx7d-eval", "toradex,colibri_imx7d", "fsl,imx7d";
chosen {
};
aliases {
};
memory {
};
cpus {
};
interrupt-controller@31001000 {
};
clocks {
};
timer {
};
etr@0,30086000 {
};
tpiu@0,30087000 {
};
replicator {
};
etf@0,30084000 {
};
funnel@1,30083000 {
};
funnel@0,30041000 {
};
etm@0,3007c000 {
};
reserved-memory {
};
soc {
};
etm@1,3007d000 {
};
backlight {
};
pxp_v4l2_out {
};
regulator-module-3v3 {
};
regulator-module-3v3-avdd {
};
sound {
};
tcml@007f8000 {
};
gpio-keys {
};
usbc_det {
};
regulator-3v3 {
};
regulator-5v0 {
};
regulator-usbh-vbus {
};
};
Colibri iMX7 # fdt list /soc/
soc {
#address-cells = <0x00000001>;
#size-cells = <0x00000001>;
compatible = "simple-bus";
interrupt-parent = <0x00000011>;
ranges;
busfreq {
};
caam-sm@00100000 {
};
caam_secvio {
};
pmu {
};
sram@00900000 {
};
sram@901000 {
};
sram@00180000 {
};
sram-mf@00900000 {
};
dma-apbh@33000000 {
};
gpmi-nand@33002000 {
};
aips-bus@30000000 {
};
aips-bus@30400000 {
};
aips-bus@30800000 {
};
pcie@0x33800000 {
};
};
Colibri iMX7 # fdt list /soc/aips-bus@30000000/
aips-bus@30000000 {
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <0x00000001>;
#size-cells = <0x00000001>;
reg = <0x30000000 0x00400000>;
ranges;
gpio@30200000 {
};
gpio@30210000 {
};
gpio@30220000 {
};
gpio@30230000 {
};
gpio@30240000 {
};
gpio@30250000 {
};
gpio@30260000 {
};
lpsr-gpr@30270000 {
};
wdog@30280000 {
};
wdog@30290000 {
};
wdog@302a0000 {
};
wdog@302b0000 {
};
iomuxc-lpsr@302c0000 {
};
gpt@302d0000 {
};
gpt@302e0000 {
};
gpt@302f0000 {
};
gpt@30300000 {
};
kpp@30320000 {
};
iomuxc@30330000 {
};
iomuxc-gpr@30340000 {
};
mqs {
};
ocotp-ctrl@30350000 {
};
anatop@30360000 {
};
tempmon {
};
caam-snvs@30370000 {
};
snvs@30370000 {
};
ccm@30380000 {
};
src@30390000 {
};
gpc@303a0000 {
};
};
Colibri iMX7 # fdt list /soc/aips-bus@30000000/gpio@30200000
gpio@30200000 {
compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
reg = <0x30200000 0x00010000>;
interrupts = <0x00000000 0x00000040 0x00000004 0x00000000 0x00000041 0x00000004>;
gpio-controller;
#gpio-cells = <0x00000002>;
interrupt-controller;
#interrupt-cells = <0x00000002>;
linux,phandle = <0x00000040>;
phandle = <0x00000040>;
};
Thank you for this valuable information. Is the first gpio bank a good choice to put it away from the A7/Linux? Is there any good document which shows which pins of which bank are used for what?
Is there any good document which shows which pins of which bank are used for what?
Sorry but we don’t have any document with such information collated in a single place. You can find the pins configured as gpios by default as per the Colibri standard in Colibri iMX7 datasheet.
Ok. I already figured out that i want to use gpio bank 4 exclusivly for M4. IMHO the pins 11-15 on the Viola board connector X9 are all configured as gpios and belong to bank 4. So, where can i find mapping information like: gpio bank 1 == gpio@30200000… ?
Hello,
I’m in the same situation. Actually this thread pointed me to this issue. So I hope it is okay to ask some additional questions.
While running Linux I can run the following command to see which GPIOs are in use:
cat /sys/kernel/debug/gpio
On my Viola board I get this output:
GPIOs 0-31, platform/30200000.gpio, 30200000.gpio:
gpio-0 (cd ) in lo
GPIOs 32-63, platform/30210000.gpio, 30210000.gpio:
GPIOs 64-95, platform/30220000.gpio, 30220000.gpio:
GPIOs 96-127, platform/30230000.gpio, 30230000.gpio:
gpio-103 (VCC_USB[1-4] ) out lo
GPIOs 128-159, platform/30240000.gpio, 30240000.gpio:
GPIOs 160-191, platform/30250000.gpio, 30250000.gpio:
GPIOs 192-223, platform/30260000.gpio, 30260000.gpio:
gpio-194 (? ) out lo
gpio-195 (Power-Key ) in hi
gpio-206 (id ) in lo
(I have added a gpio-poweroff(?) and a gpio-key(Power-Key).)
This means I can’t use any GPIO1_IOxx, GPIO4_IOxx and GPIO7_IOxx pins.
Is this correct?
This behavior becomes only an issue, when I want to use an GPIO as an interrupt source for the M4?
In my current configuration I could still use GPIO7_IO1 as an ‘regular’ input and/or output for the M4 without problems?
Best regards,
Jochen Loeser
@qojote you are mention “…GPIO with a specific (selectable) frequency…”. You may able to use a PWM unit for such a task. Then you would have both cores for other tasks still available.
Any GPIO already used by a driver cannot be used on Linux unless you either disable the driver or change the pin multiplexing. For example, GPIO1_IO01 is used for wakeup from suspend and GPIO7_IO14 is used for USB client detect. It would be recommended that a GPIO bank used on the M4 side be not used on the Linux side or vice versa.