Generating pin_mux files for Apalis I.MX8QM - Cortex M4

Hi everyone,

I kindly ask for your help with generating the mux files for Cortex M4_1 for my Apalis i.MX8QM. The current version of the NXPConfigurator (V15) has limited support for i.MX8QM (SDK_2_9_0_MIMX8QM6xxxFF]. The i.MXConfigurator (V14) is in a similar situation. The header files generated are significantly different from those included in the hello_world example:

SDK examples
/***********************************************************************************************************************

  • Definitions
    **********************************************************************************************************************/

/* UART0_RTS_B (number AU45), BB_UART2_RX/J20A[28] /
/
Routed pin properties /
#define BOARD_INITPINS_BB_UART2_RX_PERIPHERAL DMA__UART2
/
!< Peripheral name /
#define BOARD_INITPINS_BB_UART2_RX_SIGNAL uart_rx
/
!< Signal name /
#define BOARD_INITPINS_BB_UART2_RX_PIN_NAME UART0_RTS_B
/
!< Routed pin name /
#define BOARD_INITPINS_BB_UART2_RX_PIN_FUNCTION_ID SC_P_UART0_RTS_B
/
!< Pin function id /
#define BOARD_INITPINS_BB_UART2_RX_LABEL “BB_UART2_RX/J20A[28]” /
!< Label /
#define BOARD_INITPINS_BB_UART2_RX_NAME “BB_UART2_RX” /
!< Identifier */

Versus Configurator

/***********************************************************************************************************************

  • Definitions

**********************************************************************************************************************/

/* UART0_RTS_B (number AU45), BB_UART2_RX/J20A[28] */

#define BOARD_INITPINS_BB_UART2_RX_PIN_FUNCTION_ID IMX8QM_UART0_RTS_B /*!< Pin function id */

This lack of details generates errors at build.

In general, what are the plans for providing full support the Cortex M4 cores on this flagship product and SoM? I have seen a recognition of the fact that there are a limited number of examples for Cortex M4s but this was some time ago and there was no progress. I am struggling to connect a TFT display using SPI to Cortex M4_1 but all the SPI examples from the SDK are for board to board communication.

Many thanks,

Florin

Hey @Florin,

A couple of questions: Are you trying to run FreeRTOS on the M-core? We do have a ‘hello world’ guide that uses the MCUXpresso SDK. Have you run through this guide already?

We do not have guides on how to use the NXP MCUXpresso Config Tool, the specific how-to would belong to NXP, if you had questions on the specific tool I believe their forums would be better suited.

This is a difficult question because “full support” has a wide range of meaning. My personal perspective is that Toradex (we) provide as much technical support as possible and ultimately will refer to our partner network when the task requires it.

-Eric

Hi Eric,

Thanks for replying to my questions. I asked these questions in the NXP forum and I am still waiting to receive an answer.

I am working on connecting two small displays (GC9A01) to one of the M4s cores using LVGL (bare metal).

My first question related to the differences between the pin_mux.h file from the latest SDK for i.MX8QM as provided in the hello-world example and the file geared by the MCUXpresso Configurator. I looked further into this matter and I found out that the an older version of the Configurator Tool for i.MX (13.1) generates a file that would run on the hello-world example from the SDK, altough has only one line per pin. This allows me to configure the pins for my project using this tool.

My second question regarding the full support for iMX8QM. On the Cortex M4s there are very few examples on how to do common tasks from the Arduino world. To connect to a low speed TTF Display one needs to use the SPI and have a display driver. The SPI SDK examples are for board-to-board communications and they are not helpful. I am struggling now with using fsl_lpspi and fsl_lsspi_cmsis based on an example from NXP that uses LVGL for a different display (evkmimxrt1010_lvgl_guider_bm).

The MCUXpresso is a good IDE (Eclipse and VS Code) for working on these matters. Wouldn’t be good if the will also support toradex boards? At the moment for the M4 parts of Aplais one is left to develop a project using the command line and shell scripts.

Kind regards,
Florin

Hey @Florin,

I’m not up to date on the difference between V13, V14 and V15. But I believe if you are able to select the correct processor, they should both generate usable files. For the IMX8QM, the processor would be MIMX8QM6xxxFF, also making sure to select the correct core. It sounds like you are able to do that now, but with an V13?

This tool is maintained by NXP, and they have stated that there isn’t any support for Cortex-M core for the IMX8 series of processors. If you find it valuable it may be worth telling them.

I agree, development on the M-core is not as user friendly as it could be. I believe this will take time as the global community finds the value in utilizing the heterogeneous multi-core processor capabilities. And the value for abstraction become more important. Can I ask what is the drive to have the GUI display on the M-core side of things? What are the requirements for this?

-Eric