Find device is boot up by watchdog timer!

Technical Support
,
7

Update on this thread.

We thought of the following possibilities and observations.

  1. We discovered that an iMX8MP CPU can activate gpio GPIO1_IO02__WDOG1_WDOG_B when the watchdog is reset.
    The GPIO1_IO02__WDOG1_WDOG_B pin may be linked to the PMIC reset pin. When WDT is engaged, it also toggles GPIO1_IO02__WDOG1_WDOG_B, causing PMIC reset.
    We are unable to confirm this possibility due to limited information regarding the verdin SOM architecture.

  2. We tried to disable the external gpio trigger capabilities in the DTS file as below. However, no changes to reset cause, remained the same POR.

&wdog1 {
/* fsl,ext-reset-output; /
/ pinctrl-names = “default”; /
/ pinctrl-0 = <&pinctrl_wdog>; */
status = “okay”;
};

pinctrl_wdog: wdoggrp {
fsl,pins = <
MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B 0x1c4 /* PMIC_WDI */
>;
};

  1. We found an older open community post with the same issue on Colibri iMX6ULL.
    Colibri iMX6ULL: Watchdog not showing as reset cause.

Was a solution identified in this previous case?