Currently we are working with a custom carrier board using Verdin IMX8MP SoM. We have Toradex Interface Ethernet switch no PHY. Input and output is through RGMII. Linux never generating Clock on RGMII. We are trying to get this interface working.
The SoM communication via MDIO interface with PHY it shows up as Eth0. When I connect a ethernet cable to a computer, the link detect works and the PHY communication to the SoM that the cable is plugged in. We are able to send and receive traffic packets on Eth0 successfully.
first, welcome to our community! Feel free to ask any questions that you might have.
I understand that you are trying to add a second ethernet controller to Verdin MPlus in your custom carrier board and it’s not working, am I correct?
Can you share more details on how you are trying to do it and which chip are you using? Any information will be helpful.
You can also take a look at these two guides to help you use a second ethernet:
We noticed, Upon power cycle, u-boot Could not get PHY for FEC0 address. somehow, driver eliminates eth0, and eth1 becomes PRIME (eth0).
Any clue why this is happening? I think this is source of our problem.
What is working:
eth0 is working, if I connect a ethernet cable to a computer, the link detect works, and the PHY communication to the SoM that the cable is plugged. I am able to send and receive traffic packets to eth0.
I see imx-dwmac on kernel logs, I don’t see any fec on kernel logs. i.e… imx-dwmac some-address.ethernet eth0 Link is Up.
If I move the same SoM (Verdin iMX8MP) to Toradex baseboard, with the same software, u-boot could detect both eth0 and eth1 PHY address. I see mx-dwmac on kernel logs, I also see fec on kernel logs:
fec some-address.ethernet eth0: Link is Up.
When you plug the Verdin into the Toradex carrier board, does it works with our device tree or using your custom device tree?
With that, we can investigate if it is a software (wrong device tree) or hardware (wrong connections) bug. As you mentioned, apparently it is a software bug, am I correct?
Hi Hiago:
We havenow created 2nd Ethernet interface. I am able to ping and get reply back. However, Ethernet controller configured as RMII instead of RGMII.
We have specified phy-mode = “rgmii-id”; in device-tree.
What would be the root cause of this issue?
Could you please share with us your device tree and any overlays that you might be using?
You can use this website: share.toradex.com and then send me the link. Is that ok for you?
thanks for sharing the file. Just a quick question, does it works with our carrier board? Could you test this, please? Or it also fails with our hardware?
Hi Hiago:
We are waiting on your response? I repeat my question again, our custom carrier board only has one external ethernet port (EHT_1) , and we are trying to add 2nd ethernet controller to Verdin iMX8MPlus in our carrier board. Please see link snip of fec node from dtsi (device-tree file)
We are seeing following error:
fec 30be0000.ethernet eth0: no PHY, assuming direct connection to switch mdio_bus_id = 303085963
libphy: PHY fixed-0:00 not found
fec 30be0000.ethernet eth0: could not attach to PHY
Our Linux version: 5.4.129-rt61-5.4.0-devel+git.022cb949c6ec
Do we need to update to later toradex release? or update FEC driver? or can this be be fixed by changing device-tree fec node?
Sorry for the long delay, I was trying to test it on my side. I couldn’t reproduce or see what was happening here on my side.
I’ve searched the internet for this problem and appears the FEC driver has been fixed, so there is no need to patch it. I believe it’s just a matter of correcting the device tree.
Can you also share your board schematics to check if all the hardware connections are correct?
From the logs and the device, it appears the software side is correct. I’ll need to take a deeper look into that.
Hi Hiago:
Attached is a PDF of our RGMII interface: https://share.toradex.com/wtwwwodu5vvjosa
In addition, it would be helpful to know if there is a signal that the i.MX 8MP can exercise to cause the on module Ethernet PHY to reset. Something like this from the Verdin IMX8MP Data sheet. "It is possible to turn off the power rails for the on-module Ethernet PHY completely to save power. GPIO2_IO20 controls the rails.”
Hi Hiago:
I just wanted to give you an update: We are able to attach to KSZ9131 PHY, however I am getting error (please see below).
Any feedback on schematic with RGMII interface would be greatly appreciated.
Thanks again
Fariba
here is the errors:
[ 1.875425] 003: Microchip KSZ9131 Gigabit PHY 30be0000.ethernet-1:0x: ksz9131_config_init
[ 1.875434] 003: Microchip KSZ9131 Gigabit PHY 30be0000.ethernet-1:0x: ksz9131_config_rgmii_delay
[ 1.878129] 003: gpio gpiochip3: (30230000.gpio): gpiochip_lock_as_irq: tried to flag a GPIO set as output for IRQ
[ 1.878134] 003: gpio-mxc 30230000.gpio: unable to lock HW IRQ 18 for IRQ
[ 1.878136] 003: genirq: Failed to request resources for 30be0000.ethernet-1:0x (irq 166) on irqchip gpio-mxc
[ 1.878157] 003: Microchip KSZ9131 Gigabit PHY 30be0000.ethernet-1:0x: Error -22 requesting IRQ 166, falling back to polling
[ 1.878164] 003: Microchip KSZ9131 Gigabit PHY 30be0000.ethernet-1:0x: attached PHY driver [Microchip KSZ9131 Gigabit PHY] (mii_bus:phy_addr=30be0000.ethernet-1:0x, irq=POLL)
Could you please check if the schematics that you shared with me are correct?
Because it looks like RX and TX are inverted. For example, in the PDF that you showed me, pin 201 ETH2_RGMII_RXD_0 is going to TXD0 in the KSZ9131 chip. Looking at Toradex schematics, we can see the image below.
Hi Hiago:
I passed your concern to our H/W team, here is their response: The signals are not inverted because we are implementing a MAC to MAC interface, not a MAC to PHY interface. Those strapping options apply to the PHY, not to the Toradex.
I had this ticket escalated internally and I was waiting for a reply from our team. Great news it’s working now! Was it a problem with the device tree? Can you share the solution?