Error while loading M4 Code in iMX7

Technical Support
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1

Dear All,

I am trying to load freertos rpmsg gpio code compiled with different linker files.
I have success with OCRAM and TCM linkers but bootaux fails with following error when code is compiled using ddr linker file.

Invalid aux core address: 8ff80000

What can be the issue?

Regards

2

Welcome to Toradex Community.

Could you please provide the below details,
Mention the link to the code which you want to try?
Did you do any changes in Code?
What exact steps you are following to compile the code?

3
  1. FreeRTOS BSP Hello World Code I wish to run with DDR Linker File.
  2. No Changes
  3. As per FreeRTOS on the Cortex-M4 of a Colibri iMX7 | Toradex Developer Center
  4. As per GPIO example using Eclipse
4

I’m trying to migrate from u-boot 2016.11 to u-boot 2019.07 and I’m facing the same issue.

Would be glad to have some pointers … I’ll let you know if I find something on my side

5

I’m running in the same issue past days with u-boot 2019.07.

After checking the u-boot error message I found this:

Have a look into the file ./arch/arm/mach-imx/mx7/soc.c of the u-boot source.

You will find this table:

--------8<-----------------------------
#ifdef CONFIG_IMX_BOOTAUX
196 /*
197  * Table of mappings of physical mem regions in both
198  * Cortex-A7 and Cortex-M4 address spaces.
199  *
200  * For additional details check sections 2.1.2 and 2.1.3 in
201  * i.MX7Dual Applications Processor Reference Manual
202  *
203  */
204 const struct rproc_att hostmap[] = {
205         /* aux core , host core,  size */
206         { 0x00000000, 0x00180000, 0x8000 }, /* OCRAM_S */
207         { 0x00180000, 0x00180000, 0x8000 }, /* OCRAM_S */
208         { 0x20180000, 0x00180000, 0x8000 }, /* OCRAM_S */
209         { 0x1fff8000, 0x007f8000, 0x8000 }, /* TCML */
210         { 0x20000000, 0x00800000, 0x8000 }, /* TCMU */
211         { 0x00900000, 0x00900000, 0x20000 }, /* OCRAM_128KB */
212         { 0x20200000, 0x00900000, 0x20000 }, /* OCRAM_128KB */
213         { 0x00920000, 0x00920000, 0x20000 }, /* OCRAM_EPDC */
214         { 0x20220000, 0x00920000, 0x20000 }, /* OCRAM_EPDC */
215         { 0x00940000, 0x00940000, 0x20000 }, /* OCRAM_PXP */
216         { 0x20240000, 0x00940000, 0x20000 }, /* OCRAM_PXP */
217         { 0x10000000, 0x80000000, 0x0fff0000 }, /* DDR Code alias */
218         { 0x80000000, 0x80000000, 0xe0000000 }, /* DDRC */
219         { /* sentinel */ }
220 };
221 #endif
------>8-------------------------------------

The error is the wrong size in line 218. Replace 0xe0000000 with 0x60000000

Background:
The max. DDR size is from 8000’0000 to DFFF’FFFF
Therefore the size is not 0xe0000000 it’s 0x60000000

The hostmap will be used in ./arch/arm/mach-imx/imx_bootaux.c to check the valid region.

Hope this help you

6

HI @Mathew11

Thanks for your valuable input. We will correct this.

Best regards,
Jaski

8

Hi @gada.kashyap

Please check the answer above if not already done for the resolution of your issue.

Best regards,
Jaski