Enabling UART4 and UART5 on Colibri iMX6

Hello, i’m trying to enable the UART4 and UART5 on a Colibri iMX6DL 512MB using a custom made SBC.

To enable it, I added the following on my device-tree:

&iomuxc {

  uart {
                pinctrl_uart4: ctrl_uart4 {
                        fsl,pins = <
                                MX6QDL_PAD_CSI0_DAT12__UART4_RX_DATA   0x1b0b1 
                                MX6QDL_PAD_CSI0_DAT13__UART4_TX_DATA   0x1b0b1 
                        >;
                };

                pinctrl_uart5: ctrl_uart5 {
                        fsl,pins = <
                                MX6QDL_PAD_CSI0_DAT14__UART5_RX_DATA   0x1b0b1 
                                MX6QDL_PAD_CSI0_DAT15__UART5_TX_DATA   0x1b0b1 
                        >;
                };
        }; };

&uart4 {
        pintctrl-names = "default";
        pinctrl-0 = <&pinctrl_uart4>;
        fsl,dte-mode;
        status = "okay"; };

&uart5 {
        pintctrl-names = "default";
        pinctrl-0 = <&pinctrl_uart5>;
        fsl,dte-mode;
        status = "okay";};

Then I proceed to boot and I can check that /dev/ttymxc3 and /dev/ttymxc4 were mounted.

Then I proceed to start a simple test writing and reading values from that UART using the following:

stty -F /dev/ttymxc3 115200

testing module TX

echo "test" > /dev/ttymxc3

testing module RX

cat < /dev/ttymxc3 &

I’m using a external USB-TTL converter on my host to test the UART.

However I not receiving any data from the module nor I’m receiving any data from the host pc.

I’m missing any additional configuration on the device tree?

Thank you in advance.

Hi @ferlzc ,

I did some tests here and was able to make UART4 and UART5 work, see below the patch:

diff --git a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
index 426eca00d529..1dfafe1d3a28 100644
--- a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
+++ b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
@@ -238,6 +238,14 @@
 	status = "okay";
 };
 
+&uart4 {
+	status = "okay";
+};
+
+&uart5 {
+	status = "okay";
+};
+
 &usbh1 {
 	status = "okay";
 };
diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
index cb4581e53b1b..12740a5133b7 100644
--- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
@@ -786,6 +786,24 @@
 		};
 	};
 
+	uart4 {
+		pinctrl_uart4_dte: uart4grp-dte { /* DTE mode */
+			fsl,pins = <
+				MX6QDL_PAD_CSI0_DAT12__UART4_RX_DATA 0x1b0b1
+				MX6QDL_PAD_CSI0_DAT13__UART4_TX_DATA 0x1b0b1
+			>;
+		};
+	};
+
+	uart5 {
+		pinctrl_uart5_dte: uart5grp-dte { /* DTE mode */
+			fsl,pins = <
+				MX6QDL_PAD_CSI0_DAT14__UART5_RX_DATA 0x1b0b1
+				MX6QDL_PAD_CSI0_DAT15__UART5_TX_DATA 0x1b0b1
+			>;
+		};
+	};
+
 	usdhc {
 		pinctrl_mmc_cd: gpio_mmc_cd {
 			fsl,pins = <
@@ -855,10 +873,10 @@
 				MX6QDL_PAD_CSI0_DAT7__EIM_DATA05 0x1b0b0
 				MX6QDL_PAD_CSI0_DAT8__EIM_DATA06 0x1b0b0
 				MX6QDL_PAD_CSI0_DAT9__EIM_DATA07 0x1b0b0
-				MX6QDL_PAD_CSI0_DAT12__EIM_DATA08 0x1b0b0
+				/*MX6QDL_PAD_CSI0_DAT12__EIM_DATA08 0x1b0b0
 				MX6QDL_PAD_CSI0_DAT13__EIM_DATA09 0x1b0b0
 				MX6QDL_PAD_CSI0_DAT14__EIM_DATA10 0x1b0b0
-				MX6QDL_PAD_CSI0_DAT15__EIM_DATA11 0x1b0b0
+				MX6QDL_PAD_CSI0_DAT15__EIM_DATA11 0x1b0b0*/
 				MX6QDL_PAD_CSI0_DAT16__EIM_DATA12 0x1b0b0
 				MX6QDL_PAD_CSI0_DAT17__EIM_DATA13 0x1b0b0
 				MX6QDL_PAD_CSI0_DAT18__EIM_DATA14 0x1b0b0
@@ -1022,6 +1040,20 @@
 	status = "disabled";
 };
 
+&uart4 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart4_dte>;
+	fsl,dte-mode;
+	status = "disabled";
+};
+
+&uart5 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart5_dte>;
+	fsl,dte-mode;
+	status = "disabled";
+};
+
 &usbh1 {
 	vbus-supply = <&reg_usb_host_vbus>;
 	status = "disabled";

It seems that your changes are correct, but you need to remove the previous function from the pin.

Can you please do some tests?

Best regards,

Daniel Morais

Hi @daniel.tx,
I got the UART4 e UART5 working with your patch.

I was getting error because I did the pinctrl declaration on the imx6dl-colibri-eval-v3.dts and configured the &uart4 e &uart5 in the same file. Seems to be a convention to declare a peripheral configuration on .dtsi file with status=“disabled” and the enabled it on the .dts file. See the first gotcha.

The correct way is, as your patch, to declare the pinctrl-uart4 e pinctrl-uart5 on the imx6qdl-colibri.dtsi then configure

&uart4 {
       pinctrl-names = "default";
      pinctrl-0 = <&pinctrl_uart4_dte>;
      fsl,dte-mode;
      status = "disabled";
 };
 
 &uart5 {
      pinctrl-names = "default";
      pinctrl-0 = <&pinctrl_uart5_dte>;
      fsl,dte-mode;
      status = "disabled";
 };

and then on the imx6dl-colibri-eval-v3.dts change the node status=“okay”

&uart4 {
     status = "okay";
 };
 
 &uart5 {
     status = "okay";
 };

Thanks again for your help!

Perfect that it works. Thanks for the feedback.