Enabling Poweroff pin

Technical Support
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1

Hi Marcel, I’m trying to enable the poweroff pin based on

and with a post you’ve done CONFIG_POWER_RESET_GPIO in kernel 4.1.44 Apalis IMX6 - Technical Support - Toradex Community

But I’m not sure about the complete sequence.

After enabled the “Board level reset or poweroff” I’ve to include the new node with the right pin in dts file and then recompile the Kernel. That’s all?

1551-poweroff.png
1551-poweroff.png707×214 20.5 KB

2

@marcel.tx

3

Yes, plus of course wire it all up properly and then do a proper shutdown resp. poweroff once that stuff is all deployed.

4

Hi @marcel.tx. What do you mean with " do a proper shutdown resp. poweroff once that stuff is all deployed" ?

Thanks in advance

5

Hi, this mean use the command shutdown or poweroff.

6

Hi @marcel.tx,
How could I check if the node added in the .dts file is working correctly (added correctly) ?
I’ve recompiled the kernel and added inside the gpio-keys the

gpio-poweroff {
compatible = “gpio-poweroff”;
gpios = <&gpio2 25 GPIO_ACTIVE_LOW>;
};

7

@marcel.tx
the pin doesn’t appear with the cat

gpiochip0: GPIOs 0-31, parent: platform/209c000.gpio, 209c000.gpio:

gpiochip1: GPIOs 32-63, parent: platform/20a0000.gpio, 20a0000.gpio:
gpio-37 ( |cd ) in lo
gpio-53 ( |sysfs ) out hi

gpiochip2: GPIOs 64-95, parent: platform/20a4000.gpio, 20a4000.gpio:
gpio-90 ( |enable ) out hi
gpio-93 ( |sysfs ) in hi
gpio-95 ( |usb_host_vbus ) out lo

gpiochip3: GPIOs 96-127, parent: platform/20a8000.gpio, 20a8000.gpio:
gpio-108 ( |scl ) in hi
gpio-109 ( |sda ) in hi

gpiochip4: GPIOs 128-159, parent: platform/20ac000.gpio, 20ac000.gpio:
gpio-130 ( |spi_imx ) out hi

gpiochip5: GPIOs 160-191, parent: platform/20b0000.gpio, 20b0000.gpio:

gpiochip6: GPIOs 192-223, parent: platform/20b4000.gpio, 20b4000.gpio:
gpio-204 ( |id ) in lo

8

you can check /proc/device-tree for the gpio-poweroff node and /proc/config.gz for POWER_RESET_GPIO

9

Hi @dominik.tx I can’t get the right pin configuration

I’ve checked

root@colibri-imx6:/proc/device-tree/gpio-poweroff# ls
compatible gpios name

CONFIG_POWER_RESET=y

CONFIG_POWER_RESET_BRCMKONA is not set

CONFIG_POWER_RESET_BRCMSTB is not set

CONFIG_POWER_RESET_GPIO=y

CONFIG_POWER_RESET_GPIO_RESTART is not set

CONFIG_POWER_RESET_IMX is not set

CONFIG_POWER_RESET_LTC2952 is not set

CONFIG_POWER_RESET_RESTART is not set

CONFIG_POWER_RESET_VERSATILE is not set

CONFIG_POWER_RESET_SYSCON is not set

CONFIG_POWER_RESET_SYSCON_POWEROFF is not set

BUT, in the /sys/kernel/debug/gpio

gpiochip5: GPIOs 160-191, parent: platform/20b0000.gpio, 20b0000.gpio:
gpio-175 ( |? ) out hi

and in the “?” must say gpio-poweroff

10

So you are targetting GPIO2_IO25 being the i.MX 6 SoC ball EIM_OE available on SODIMM pin 91, right? And where exactly did you configure such pin’s muxing to GPIO e.g. as done here for a similar pin and discussed here?