Hi Majd
The SPI subsystem can only divide its clock input by integers, and you must divide by at least 2.
It is a two stage divider. The first can divide by 1, 2, 4, 8, 16, 32, 64 and, 128. The second by any integer between 2 … 257.
So if you set that clock to 48MHz (assuming that the clock subsystem can generate that exact clock) then your SCK can be e.g.:
48 / 1 / 2 = 24MHz
48 / 1 / 3 = 16MHz
48 / 1 / 4 = 12MHz
…
Note that if you do not use ‘even’ integers, then the resulting SPI SCK will not be symmetrical.
So if you want 20MHz you should set the assigned clock rate to an even multiple, e.g. to 40MHz or 80MHz.
Max