Edt display integration into apalis-imx6

Technical Support
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1

Hi folks,

i am planning to integrate our display 4.3 inch etm0430g0dh6 (18 bits.) into linux toradex upstream 6.6 version. i am using yocto scarthgap 7.1.0 toradex version. here is my device tree configuration for my display:

/ {
    lcd_display_edt: disp0 {
		compatible = "fsl,imx-parallel-display";
		bus-width         = <18>;           /* 18 data lines */
		interface-pix-fmt = "rgb666";       /* 6 bits per channel */


		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_ipu1_ek_lcdif>;
		status = "okay";

		port@0 {
			reg = <0>;

			lcd_display_edt_in: endpoint {
				remote-endpoint = <&ipu1_di1_disp1>;
			};
		};

		port@1 {
			reg = <1>;

			lcd_display_edt_out: endpoint {
				remote-endpoint = <&edt_panel_in>;
			};
		};
	};

	edt_panel: panel {
		compatible = "edt,etm0430g0dh6";
		status = "okay";

		width-mm = <95>;
		height-mm = <54>;

		port {
			edt_panel_in: endpoint {
				remote-endpoint = <&lcd_display_edt_out>;
			};
		};
	};
};

The display shows only two colours blue and green when i do the Kmscube test. Thanks for your support.

2

Hi, I’m the Toradex AI Assistant.

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Hello! Thank you for providing detailed information about your display integration and device tree snippet.

The issue where only blue and green are visible during the Kmscube test typically indicates a problem with display data mapping—specifically, a misconfiguration in the pixel format, bus width, or pin multiplexing for your 18-bit RGB display.

Here are some steps and areas to check:

1. Pixel Format and Bus Width

Make sure these properties in your device tree are set correctly for your 18-bit (RGB666) display:

bus-width = <18>;
interface-pix-fmt = "rgb666";

This aligns with your current setup and is correct for a display using 6 bits per color channel.

2. Pin Control / Data Line Mapping

If only two colors are visible, the red channel pins may not be mapped or configured correctly. Double-check your pinctrl group (referenced as &pinctrl_ipu1_ek_lcdif) to ensure all 18 data lines (for R0–R5, G0–G5, B0–B5) are assigned to the appropriate SoC pins and muxed for LCD output, not other functions.

  • If any pin configuration is missing or incorrect, that color channel won’t be transmitted to the display.
  • See First Steps with Device Trees for how to review and update your pin multiplexing.

3. Panel Timing

While usually less likely in this symptom, also verify that your panel timing parameters (in the panel node or referenced timing subnode) match your display specification. Incorrect timing could lead to color or image corruption in some cases.

4. Device Tree Connection

Your port and endpoint structure looks correct. Ensure that:

  • The LCD output is routed from the display controller to the panel node.
  • No typos or node mismatches exist between remote-endpoint references.

Key Resources:

Recommended Actions:

  1. Double-check your pinctrl node for completeness regarding all 18 lines.
  2. Confirm your SoC supports 18-bit parallel output and verify that your LCD connector routing matches the data sheet.
  3. Try changing interface-pix-fmt to “bgr666” as a quick test (some panels expect BGR order), though usually “rgb666” is correct.
  4. If screen still only shows green and blue, inspect the red data lines for continuity and review the device tree for any possible typos.

If you’d like, you can paste or describe your pinctrl_ipu1_ek_lcdif node for another look.

Let me know if these checks help, or if you need more guidance.

Best regards,
Toradex AI Assistant.

3 
pinctrl_ipu1_ek_lcdif: ipu1eklcdifgrp {
		fsl,pins = <
			MX6QDL_PAD_EIM_A16__IPU1_DI1_DISP_CLK	0x61

			MX6QDL_PAD_EIM_DA10__IPU1_DI1_PIN15	0x61 			/* DE */
			/*MX6QDL_PAD_EIM_DA11__IPU1_DI1_PIN02	0x61	*/		/* HSync */
			/*MX6QDL_PAD_EIM_DA12__IPU1_DI1_PIN03	0x61 	*/		/* VSync */
			
			/*MX6QDL_PAD_EIM_DA9__IPU1_DISP1_DATA00	0x61
			MX6QDL_PAD_EIM_DA8__IPU1_DISP1_DATA01	0x61*/
			MX6QDL_PAD_EIM_DA7__IPU1_DISP1_DATA02	0x61
			MX6QDL_PAD_EIM_DA6__IPU1_DISP1_DATA03	0x61
			MX6QDL_PAD_EIM_DA5__IPU1_DISP1_DATA04	0x61
			MX6QDL_PAD_EIM_DA4__IPU1_DISP1_DATA05	0x61
			MX6QDL_PAD_EIM_DA3__IPU1_DISP1_DATA06	0x61
			MX6QDL_PAD_EIM_DA2__IPU1_DISP1_DATA07	0x61
			/*MX6QDL_PAD_EIM_DA1__IPU1_DISP1_DATA08	0x61
			MX6QDL_PAD_EIM_DA0__IPU1_DISP1_DATA09	0x61*/
			MX6QDL_PAD_EIM_EB1__IPU1_DISP1_DATA10	0x61
			MX6QDL_PAD_EIM_EB0__IPU1_DISP1_DATA11	0x61
			MX6QDL_PAD_EIM_A17__IPU1_DISP1_DATA12	0x61
			MX6QDL_PAD_EIM_A18__IPU1_DISP1_DATA13	0x61
			MX6QDL_PAD_EIM_A19__IPU1_DISP1_DATA14	0x61
			MX6QDL_PAD_EIM_A20__IPU1_DISP1_DATA15	0x61
			/*MX6QDL_PAD_EIM_A21__IPU1_DISP1_DATA16	0x61
			MX6QDL_PAD_EIM_A22__IPU1_DISP1_DATA17	0x61*/
			MX6QDL_PAD_EIM_A23__IPU1_DISP1_DATA18	0x61
			MX6QDL_PAD_EIM_A24__IPU1_DISP1_DATA19	0x61
			MX6QDL_PAD_EIM_D31__IPU1_DISP1_DATA20	0x61
			MX6QDL_PAD_EIM_D30__IPU1_DISP1_DATA21	0x61
			MX6QDL_PAD_EIM_D26__IPU1_DISP1_DATA22	0x61
			MX6QDL_PAD_EIM_D27__IPU1_DISP1_DATA23	0x61
		>;
	};

here is the pinctrl_ipu1_ek_lcdif. in our case pins R2 to R7 are connected and same for others too

4

Hello @farooq,

How is the display connected to the Apalis module?
Could you send schematics snippets of such connection?

Best Regards,
Bruno

5

Hi Bruno,

Thanks for your response. I just set interface-pix-fmt = “rgb24” in dts file and skipped the lower Data bits from each color, and then it worked.

Best Regards
Farooq Ahmad

6

Hello @farooq,

Thanks for the update, it is good to know you were able to get it working.

Best Regards,
Bruno