Hello all,
i have problem with correct device tree settings for imx6ull module with toradex_5.4-2.3.x-imx kernel branch and own yocto build image based on Toradex Reference Minimal Image.
I have connected two wiznet ethernet chips to ecspi1 and ecspi3.
Ethernet on ecspi3 is working without any problem.
I lost a few days trying to get it up with chip on ecspi1.
Problem is that CS pin (SODIMM 86) is probably not correctly configured by kernel.
Command “gpioinfo” output after boot:
gpiochip2 - 32 lines:
line 26: “SODIMM_86” “spi_imx” input active-high [used]gpiochip0 - 32 lines:
line 20: “SODIMM_36” “spi_imx” output active-high [used]
ecspi1 CS is configured as “input” why?
ecspi3 CS is configured as “output” correctly.
Very important is when I break in U-Boot and use command “gpio set GPIO3_26 0” (this configure pin to output) and then continue with booting after linux boot ethernet on escpi1 is working correctly.
Can anyone explain me what can be wrong. I assumed that pins should by fully configured by my compiled config dtb. All unnused devices are disabled. No conflict pins I am using it correctly during boot. All others pin uarts, leds etc. are working as i defined.
Maybe there is someting what i am missing …
Thank you for your time and response.
Messages from “cat /sys/kernel/debug/pinctrl/pinctrl-handles”:
device: 2008000.spi current state: default
state: default
type: MUX_GROUP controller 20e0000.iomuxc group: ecspi1-grp (34) function: imx6ull-colibri (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6UL_PAD_LCD_DATA20 (90)config 000000a0
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6UL_PAD_LCD_DATA22 (92)config 000000a0
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6UL_PAD_LCD_DATA23 (93)config 000000a0
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6UL_PAD_LCD_DATA21 (91)config 000070a0
device: 2010000.spi current state: default
state: default
type: MUX_GROUP controller 20e0000.iomuxc group: ecspi3-grp (36) function: imx6ull-colibri (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6UL_PAD_UART2_RX_DATA (38)config 000000a0
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6UL_PAD_UART2_CTS_B (39)config 000000a0
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6UL_PAD_UART2_RTS_B (40)config 000000a0
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6UL_PAD_UART2_TX_DATA (37)config 000070a0
Interesting lines from my dtsi configuration files are:
&ecspi1 {
status = "okay";
cs-gpios = <&gpio3 26 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi1>;
w5500A: w5500A@0 {
compatible = "wiznet,w5500";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_espi1_int>;
reg = <0>;
interrupt-parent = <&gpio1>;
interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
spi-max-frequency = <2000000>;
status = "okay";
};
};
&ecspi3 {
status = "okay";
cs-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi3>;
w5500B: w5500B@0 {
compatible = "wiznet,w5500";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_espi3_int>;
reg = <0>;
interrupt-parent = <&gpio1>;
interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
spi-max-frequency = <2000000>;
status = "okay";
};
};
&iomuxc {
imx6ull-colibri {
pinctrl_ecspi1: ecspi1-grp {
fsl,pins = <
MX6UL_PAD_LCD_DATA20__ECSPI1_SCLK 0x00a0 /* SODIMM 88 */
MX6UL_PAD_LCD_DATA22__ECSPI1_MOSI 0x00a0 /* SODIMM 92 */
MX6UL_PAD_LCD_DATA23__ECSPI1_MISO 0x00a0 /* SODIMM 90 */
MX6UL_PAD_LCD_DATA21__GPIO3_IO26 0x70a0 /* SODIMM 86 */
>;
};
pinctrl_espi1_int: espi1int-grp {
fsl,pins = <
MX6UL_PAD_GPIO1_IO08__GPIO1_IO08 0x13010 /* SODIMM 4 */
>;
};
pinctrl_ecspi3: ecspi3-grp {
fsl,pins = <
MX6UL_PAD_UART2_RX_DATA__ECSPI3_SCLK 0x00a0 /* SODIMM 38 */
MX6UL_PAD_UART2_CTS_B__ECSPI3_MOSI 0x00a0 /* SODIMM 32 */
MX6UL_PAD_UART2_RTS_B__ECSPI3_MISO 0x00a0 /* SODIMM 34 */
MX6UL_PAD_UART2_TX_DATA__GPIO1_IO20 0x70a0 /* SODIMM 36 */
>;
};
pinctrl_espi3_int: espi3int-grp {
fsl,pins = <
MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x13010 /* SODIMM 2 */
>;
};
};
};