DTS fsl,pins unable to lookup proper values

Technical Support
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1

Given the following DTS snippet from the imx8mx-verdin.dtsi file, how can I find the details behind the 2 values I see: 0x96 and 0x1d6?

    pinctrl_sai1: sai1grp {
        fsl,pins =
            <MX8MP_IOMUXC_SAI1_MCLK__AUDIOMIX_SAI1_MCLK     0x96>,  /* SODIMM 38 */
            <MX8MP_IOMUXC_SAI1_RXD0__AUDIOMIX_SAI1_RX_DATA00    0x1d6>, /* SODIMM 36 */
            <MX8MP_IOMUXC_SAI5_MCLK__AUDIOMIX_SAI1_TX_BCLK      0x1d6>, /* SODIMM 30 */
            <MX8MP_IOMUXC_SAI5_RXD1__AUDIOMIX_SAI1_TX_SYNC      0x1d6>, /* SODIMM 32 */
            <MX8MP_IOMUXC_SAI5_RXFS__AUDIOMIX_SAI1_TX_DATA00    0x96>;  /* SODIMM 34 */
    };
2

Hi, I’m the Toradex AI Assistant.

I might make mistakes or occasionally get you wrong. Our support team will step in if needed.

To understand the values 0x96 and 0x1d6 in your device tree snippet, you need to look at the i.MX8M Plus processor’s pin configuration documentation(1). These hexadecimal values represent the PAD_CTRL settings that control the electrical characteristics of the pins(2).

What These Values Control

The PAD_CTRL values configure various pin properties including(2):

  • Pull-up/Pull-down resistors
  • Drive strength
  • Slew rate
  • Hysteresis
  • Open drain configuration

Finding the Detailed Meanings

To decode these specific values (0x96 and 0x1d6), you should consult(3):

  1. i.MX 8M Plus Reference Manual - Look for the IOMUXC (IO Multiplexer Controller) section which contains the bit field definitions for PAD_CTRL registers

  2. NXP’s i.MX 8M Plus datasheet - Contains the electrical specifications and pad control register descriptions

  3. Device Tree Binding Documentation - Available in the Linux kernel source under Documentation/devicetree/bindings/(3)

Understanding the Pattern

In your example(2):

  • 0x96 is used for MCLK and TX_DATA pins
  • 0x1d6 is used for RX_DATA, TX_BCLK, and TX_SYNC pins

This suggests different electrical requirements - likely the data and clock signals need different drive strength or pull configurations than the master clock signal.

Practical Approach

When writing your own device tree overlays, you can(2)(3):

  1. Start with existing working configurations from Toradex’s device tree files
  2. Reference similar pin functions in the base device tree
  3. Consult the processor reference manual for specific bit meanings if you need to modify these values

The exact bit-by-bit breakdown requires the processor-specific documentation from NXP, as these values are hardware-specific to the i.MX8M Plus SoC.

Best regards, Toradex AI Assistant.

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