DSI to LVDS verdin imx8mm

Hi,

I have hard time configuring DSI to LVDS on a specific board (hugely similar to the verdin development board)

The fact that it’s not the exact same schematic implies that I can’t use prebuilt overlays, and must configure the sn65dsi83 and other devices by myself.

So here is the issues :
I can’t have any display on screen. problem is that I don’t have any signal on clock line out of the Verdin board (so before the sn65dsi83).
pin DSI_1_CLK_N (pin35) and DSI_1_CLK_P (pin31) remain flat on scope at near 0Volt
all others pin seems to send data (DSI_1_Dx_N and DSI_1_Dx_P have all some kind of signal on them)

Also :
I removed the default overlay in /boot/overlays.txt but I can’t manage to remove it from compilation time. on BSP 5.1.0, adding TEZI_EXTERNAL_KERNEL_DEVICETREE_BOOT_remove += “verdin-imx8mm_lt8912_overlay.dtbo” in my image recipe did the trick, but now, I’m unable to remove it by any way (also tried in my layer .conf file, tried with IMAGE_PREPROCESS_COMMAND and IMAGE_POSTPROCESS_COMMAND)

Any help appreciated

Revelant part of the device tree :

/dts-v1/;

#include "imx8mm-verdin.dtsi"
#include "imx8mm-verdin-wifi.dtsi"
//#include "imx8mm-verdin-dev.dtsi"

/ {
	model = "Toradex Verdin iMX8M Mini WB on Custom Board";
	compatible = "toradex,verdin-imx8mm-wifi-dev",
		     "toradex,verdin-imx8mm-wifi",
		     "toradex,verdin-imx8mm",
		     "fsl,imx8mm";

	
	backlight: backlight {
	
		compatible = "pwm-backlight";
		brightness-levels = <0 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116>;
		default-brightness-level = <80>;
		/* Verdin ECSPI1_SS0 (SODIMM 143) enable du backlight*/
		enable-gpios = <&gpio5 9 GPIO_ACTIVE_HIGH>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_backlight_enable>;
		power-supply = <&reg_3p3v>;
		/* Verdin PWM_3_DSI/PWM_3_DSI_LVDS (SODIMM 19) */
		pwms = <&pwm1 0 6666667 0>; // dernier param : 0 ou PWM_POLARITY_INVERTED
		status = "okay";
		

	};

};

&i2c2 {
	clock-frequency = <400000>;
	//clock-frequency = <10000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";
	
	bridge@2c {
		compatible = "ti,sn65dsi83";
		reg = <0x2c>;
		ti,dsi-lanes = <4>;
		ti,lvds-format = <1>;
		ti,lvds-bpp = <24>;
		ti,width-mm = <217>;
		ti,height-mm = <136>;
		/* Verdin MEZ_DSI_1_BKL_EN (SODIMM 21) */
		enable-gpios = <&gpio3 3 GPIO_ACTIVE_HIGH>;
		/* Verdin MEZ_DSI_1_INT HPD (pulled-down as active-high) (SODIMM 17) */
		interrupt-parent = <&gpio3>;
		interrupts = <15 IRQ_TYPE_LEVEL_HIGH>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_lvds>;
		status = "okay";

		display-timings {
			native-mode = <&lvds_timing1>;
			
			lvds_timing1: timing@1 {
				clock-frequency = <72400000>;
				hactive = <1280>;
				hfront-porch = <88>;
				hback-porch = <148>;
				hsync-len = <44>;
				vactive = <800>;
				vfront-porch = <4>;
				vback-porch = <36>;
				vsync-len = <5>;
				de-active = <1>;
				pixelclk-active = <0>;
			};
		};
		
		port {
			dsi85_in: endpoint {
				remote-endpoint = <&mipi_dsi_bridge1_out>;
			};
		};
	};
};


&lcdif {
	status = "okay";
};

&mipi_dsi {
	status = "okay";

	port@1 {
		reg = <1>;
		
		mipi_dsi_bridge1_out: endpoint {
			remote-endpoint = <&dsi85_in>;
			attach-bridge;
		};
	};
};

&gpu {
	status = "okay";
};

&iomuxc {

	pinctrl_backlight_enable: backlightgrp {
		fsl,pins = <
			/*enable du backlight*/
			MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9		0x1c6	/* SODIMM 143 */ 
		>;
	};

	pinctrl_pwm_1_custom: backlightpwmgrp {
		fsl,pins = <
			/*pwm du backlight*/
			MX8MM_IOMUXC_GPIO1_IO01_PWM1_OUT		0x6	/* SODIMM 19  */
		>;
	};
	
	pinctrl_lvds: lvdsgrp {
		fsl,pins = <
			/* SN65DSI83 enable */
			MX8MM_IOMUXC_NAND_CE2_B_GPIO3_IO3		0x1c4	/* SODIMM 21 */
			/* SN65DSI83 interrupt */
			MX8MM_IOMUXC_NAND_RE_B_GPIO3_IO15		0x184	/* SODIMM 17 */
		>;
	};
};


/* Verdin PWM_3_DSI (backlight)*/
&pwm1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm_1_custom>;
	status = "okay";
};

revelant dmesg output :

[    2.265887] i2c i2c-0: IMX I2C adapter registered
[    2.271784] sn65dsi83 1-002c: sn65dsi83_probe
[    2.276218] sn65dsi83 1-002c: sn65dsi83_brg_power_off
[    2.298896] sn65dsi83 1-002c: sn65dsi83_brg_power_on
[    2.314884] sn65dsi83 1-002c: client 0x000000004f8a9e76
[    2.321648] sn65dsi83 1-002c: sn65dsi83_brg_reset
[    2.326372] sn65dsi83 1-002c: sn65dsi83_brg_power_off
[    2.350946] i2c i2c-1: IMX I2C adapter registered
[    2.357225] i2c i2c-2: IMX I2C adapter registered
[    2.363644] i2c i2c-3: IMX I2C adapter registered
[    2.371165] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[    2.377821] [drm] No driver support for vblank timestamp query.
[    2.383848] imx-drm soc@0:bus@32c00000:display-subsystem: bound imx-lcdif-crtc.0 (ops lcdif_crtc_ops)
[    2.393144] imx_sec_dsim_drv 32e10000.mipi_dsi: failed to get blk_ctl
[    2.399709] imx_sec_dsim_drv 32e10000.mipi_dsi: version number is 0x1060200
[    2.406722] imx_sec_dsim_drv 32e10000.mipi_dsi: modalias failure on /soc@0/bus@32c00000/mipi_dsi@32e10000/port@1
[    2.416929] imx-drm soc@0:bus@32c00000:display-subsystem: sn65dsi83_bridge_attach
[    2.424440] sn65dsi83 1-002c: sn65dsi83_attach_dsi
[    2.429388] imx-drm soc@0:bus@32c00000:display-subsystem: bound 32e10000.mipi_dsi (ops imx_sec_dsim_ops)
[    2.439760] [drm] Initialized imx-drm 1.0.0 20120507 for soc@0:bus@32c00000:display-subsystem on minor 0
[    2.449278] imx-drm soc@0:bus@32c00000:display-subsystem: sn65dsi83_connector_detect
[    2.457040] imx-drm soc@0:bus@32c00000:display-subsystem: sn65dsi83_connector_get_modes
[    2.465070] imx-drm soc@0:bus@32c00000:display-subsystem: sn65dsi83_connector_mode_valid: mode: 1280*800@72400 is valid
[    2.479754] imx-drm soc@0:bus@32c00000:display-subsystem: sn65dsi83_bridge_mode_set: mode: 1280*800@72400
[    2.483644] imx-drm soc@0:bus@32c00000:display-subsystem: sn65dsi83_bridge_enable
[    2.483650] sn65dsi83 1-002c: sn65dsi83_brg_setup
[    2.483654] sn65dsi83 1-002c: sn65dsi83_brg_power_on
[    2.495179] sn65dsi83 1-002c: DSI clock [ 217200000 ] Hz
[    2.495184] sn65dsi83 1-002c: GeoMetry [ 1280 x 800 ] Hz
[    2.499915] sn65dsi83 1-002c: client 0x000000004f8a9e76
[    2.512576] sn65dsi83 1-002c: sn65dsi83_brg_start_stream
[    2.720065] sn65dsi83 1-002c: client 0x000000004f8a9e76
[    2.721347] sn65dsi83 1-002c: CHA (0xe5) = 0x01
[    2.768690] Console: switching to colour frame buffer device 160x50
[    2.850676] imx-drm soc@0:bus@32c00000:display-subsystem: fb0: imx-drmdrmfb frame buffer device

[    5.828385] imx-drm soc@0:bus@32c00000:display-subsystem: sn65dsi83_connector_detect
[    5.854580] imx-drm soc@0:bus@32c00000:display-subsystem: sn65dsi83_connector_get_modes
[    5.866576] imx-drm soc@0:bus@32c00000:display-subsystem: sn65dsi83_connector_mode_valid: mode: 1280*800@72400 is valid

[   12.523211] imx-drm soc@0:bus@32c00000:display-subsystem: sn65dsi83_connector_detect
[   12.531003] imx-drm soc@0:bus@32c00000:display-subsystem: sn65dsi83_connector_get_modes
[   12.542558] imx-drm soc@0:bus@32c00000:display-subsystem: sn65dsi83_connector_mode_valid: mode: 1280*800@72400 is valid

Thanks!

Hi, after double check (and using better scope probe !) I do have signals on CLK channels, but still no display.

I can see some artifacts on the screen (the default application is the Qt Cinematic experience). I can see the lightning ball that turn around the film cover (I know the look of the application because I successfully launched it with the development board in HDMI). So I can see this kind of ball but only in one dimension, black and white.

Hard to explain, but I see a white pixel line (well kind on gray scale) going left and right, but not to the top left and top right. I can also see some random lines corresponding of the light effect around the cover. (still in 1 dimension!).

See the video for reference : link video
At the end I kill the cinematic application.

I’m not sure what to check next to have colorful display in 2d.

Any hint ?

Thanks

Hi @aridet

Could you share the schematic of your custom carrier Board (You may sent the Visibility to “Viewable by Moderators”)?
What is the software version of your module ( uname -a )?

Thanks and best regards,
Jaski

Hi,

Thanks for you support, I managed to get the screen to works. It was a timing + frequency issue.
The first timing I used were used by a previous screen, I didn’t though that the configuration of the screen will be so fault intolerant on horizontal timing (vertical timing have a large scale of magnitude.

I’ll post my result for future reference, or if someone encounter the same kind of issue.

Datasheet of the screen shared information like resolution horizontal/vertical total/active time and refresh rate. Nothing about the porch.

There are tolerances for clock freq and total time.

Initial timing were out of bound and were taken from a previous screen.

By playing with the value, I could manage to get a completely distorted picture of the application (one image on 75% of the height, and the same image lower, but everything was ugly). Continued to play with the value to understand which variable as which role, and understood that the HSync-len let me to have a better display. The higher it was the better the display. Well until at some value, the screen crashed and needed an old device tree + power cycle to restart.

For my screen the typical Freq could not lead to a normal display in any way. I always ended up with a crashed screen or no display but recoverable just with new device tree + reboot.

Then I started playing with Clock frequency, I managed to have a good display at lower acceptable freq, at max acceptable freq (always needed to fine tune Hsync-len, a 1 clock off leaded to an ugly display in most cases).

What I don’t understand is that sometime just changing the clock freq by 100KHz could lead to a crashing screen, no picture, distorted picture, sometime possible to tune timing and have a nice picture, sometime totally impossible.

Fun part is same screen plugged on a windows pc box worked out of the box (just had to tell resolution and refresh rate! no need for any other information)

Fun part 2 is screen manufacturer said that porchs are not so important (in my case taking 1 clock from front porch and putting it in back porch could lead to unpredictable results!)

I ended trying more than 300 configurations by guess and try again method, but finally managed to find 3 working configurations, the last one is not at the max acceptable freq, and is the one used.

This was really painful to make it works, but learned a lot.

By the way, uname -a returns

Linux verdin-imx8mm 5.4.91-5.2.0-devel+git.6afb048a71e3 #1 SMP PREEMPT Wed Apr 7 08:36:44 UTC 2021 aarch64 aarch64 aarch64 GNU/Linux

Regards.

Perfect that this is working for you. Thanks for your feedback.

Best regards,
Jaski