We are using the Colibri iMX7 512MB SoM and using the Aster or the Colibri Evaluation board.
When we design our own base-board is it possible to provision for Gigabit Ethernet port that can be used at gigabit bandwidths when the module is running Windows Embedded Compact 7 image.
Dear @kapeed
Gbit Ethernet requires additional signals which are not available on any Colibri module. There are workaround solutions like using a USB-to-Ethernet adapter on your carrier board, but there are plenty of issues you could run into using such an approach.
If you need Gbit Ethernet, I recommend to use one of our Apalis modules as a base for your design.
Regards, Andy
Hi Andy,
We need 2 interfaces for our system:
- Ethernet, gigabit preferred
- External memory interface
Though the Apalis iMX6 modules have gigabit ethernet they don’t have the external memory interface. Can you suggest some module solution so that both our requirements can be met?
I see that the Apalis iMX6 supports the PCIe, but I haven’t worked with PCIe before. We want to interface an FPGA to the processor module.
It would be helpful if you can provide some insight on:
What bandwidth is supported on this module’s PCIe port?
How is it accessed from application software running on Windows Embedded?
Thanks
Dear @kapeed
I’m afraid we don’t have a module which provides both GbE and memory interface on standard pins.
For accessing the PCIe it is required to write a driver. This is not too complicated. The following basic blocks are required:
- device detection / configuration
basically covered by the default PCIe driver template
- interrupt registration (if you need interrupts at all)
- data transfer
The PCIe device appears to the driver like a mapped memory range. This means you can use regular memory read/writes to communicate with the PCIe device.
If you don’t want the hassle of building your own driver with Platform Builder, there is a kind of generic driver available (WinDriver from Jungo). There’s some comment about it on stackoverflow.
I’m afraid we never measured the actual achievable PCIe bandwidth
Regards, Andy