Dll-off mode for DDR3 on iMX7S


When going in to suspend to ram mode, does DDR3 being set to DLL-off mode to reduce frequency and current consumption?


Reading the suspend entry code, it does not seem to me that the SoC is explicitly set the MR1 register to set the DLL-off mode, see arch/arm/mach-imx/suspend-imx7.S.

There is some code for frequency scaling which seems to write the MR1 register, see arch/arm/mach-imx/ddr3_freq_imx7d.S.

Note we did not started to optimize memory suspend consumption since we still have rather high 3.3V power usage. We estimated RAM self-refresh usage to be around 14mW currently, the total memory consumption in suspend 62mW…

Is there another way (in the future) to reduce memory current consumption other than enabling DLL-off mode?

Not that we are aware of, no.