I am trying to configure my u-boot vidargs for a 7" TFT display attached to apalis imx6 som but when Xorg boots GUI there is a constant flow of vertically flowing horizontal bars flickering the screen. I believe it is a none-hardware related issue because my custom boot splash image appears solid before Xorg and GUI kick in. Are there nuances or custom arguments I can add to vidargs property in a similar form as laid out for Tegra boards in Display Output, Resolution and Timings (Linux) | Toradex Developer Center that anyone knows of to remove flicker from this configuration.
Sorry, but I do not understand. What exactly is it that are you missing on the given article concerning Apalis iMX6? There should be equal if not even more information available for iMX6 as compared to the Tegras really.
It must not be a hardware issue then. I have tried adding a combination of pixclockpol:1, vsync:1, hsync:1 to vidargs environmental variable in uboot but none seem to change the horizontal bars across screen that keep scrolling. I don’t think it is “tearing” though because from what I have read tearing is just the top and bottom halves of screen.
Note that pixclockpol:1, vsync:1, hsync:1 are not evaluated on our 3.14.52 i.MX6 kernels.
On i.MX6, if you need to change these from what the kernel thinks is the correct setting you need to add a detailed timing you have to add your timing to the kernel and choose it with its name. e.g. for the parallel RGB interface.
Assuming that your 7" display has a 800x480 pixel resolution you could try using the available timing “FusionF07A” which has its pixelclock polarity inverted compared to the calculated timing of “800x480M@60”.
