Disable PCIe SSC on TK1

Technical Support
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#1

Hi,

On a TK1 system, I’m using a PCIe architecture with a remote ref clock, and so I’d like to disable the Spread Spectrum Clocking. Is this something I should look for in the kernel and/or bootloader?

Thanks,
Mike

#2

Thanks. Just looking for the kernel. I had to make changes in a couple files:

--- a/arch/arm/mach-tegra/clock.h
+++ b/arch/arm/mach-tegra/clock.h
@@ -26,12 +26,19 @@
 #define USE_PLL_LOCK_BITS 0    /* Never use lock bits on Tegra2 */
 #else
 #define USE_PLL_LOCK_BITS 1    /* Use lock bits for PLL stabiliation */
-#define USE_PLLE_SS 1          /* Use spread spectrum coefficients for PLLE */
+//MK Disable SSC
+//#define USE_PLLE_SS 1                /* Use spread spectrum coefficients for PLLE */
+#define USE_PLLE_SS 0          /* Use spread spectrum coefficients for PLLE */
 #define PLL_PRE_LOCK_DELAY  2  /* Delay 1st lock bit read after pll enabled */
 #ifdef CONFIG_ARCH_TEGRA_3x_SOC
 #define PLL_POST_LOCK_DELAY 50 /* Safety delay after lock is detected */
 #else
-#define USE_PLLE_SWCTL 0       /* Use s/w controls for PLLE */
+//MK Disable SWCTRL if SSC is disabled
+#if USE_PLLE_SS
+#define USE_PLLE_SWCTL 0       /* Use h/w controls for PLLE */
+#else
+#define USE_PLLE_SWCTL 1       /* Use s/w controls for PLLE */
+#endif
 #define PLL_POST_LOCK_DELAY 10 /* Safety delay after lock is detected */
 #endif
 #endif
diff --git a/drivers/ata/ahci-tegra.c b/drivers/ata/ahci-tegra.c
index 791679c..9e5bdb7 100644
--- a/drivers/ata/ahci-tegra.c
+++ b/drivers/ata/ahci-tegra.c
@@ -705,8 +705,14 @@ static void tegra_ahci_set_pad_cntrl_regs(
        clk_writel(val, CLK_RST_CONTROLLER_PLLE_SS_CNTL_0);
 
        val = clk_readl(CLK_RST_CONTROLLER_PLLE_SS_CNTL_0);
+//MK
+#ifdef USE_PLLE_SS
        val &= ~(PLLE_BYPASS_SS | PLLE_SSCBYP);
-       clk_writel(val, CLK_RST_CONTROLLER_PLLE_SS_CNTL_0);
+#else
+       val &= ~(PLLE_BYPASS_SS);
+#endif
+
+  clk_writel(val, CLK_RST_CONTROLLER_PLLE_SS_CNTL_0);
#3

Perfect. I guess NVIDIA never tested their define lately e.g. also concerning AHCI aka SATA which is using the same PLLE.

#4

I guess that depends on whether or not you are looking for PCIe functionality in the kernel and/or bootloader.

In the former you would be looking at the following file whereas in the later it would be here abouts.