As the UART B is already used by the M4, I set up the UART E to get it work with RS485.
[upload|CXmmB9vkEjiK2i48js6L/oSDsNQ=]
First, my colleague chose the pins needed for the UART E using Toradex Pinout Designer. Based on his choices I created a Device Tree.
&iomuxc {
pinctrl_uart4: uart4-grp {
fsl,pins = <
MX7D_PAD_SAI2_TX_BCLK__UART4_DTE_RX 0x79 /* SODIMM 27 */
MX7D_PAD_SD2_DATA0__UART4_DTE_TX 0x79 /* SODIMM 23 */
MX7D_PAD_SD2_DATA2__UART4_DTE_RTS 0x79 /* SODIMM 100 */
MX7D_PAD_SD2_DATA3__UART4_DTE_CTS 0x79 /* SODIMM 102 */
>;
};
};
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart4>;
assigned-clocks = <&clks IMX7D_UART4_ROOT_SRC>;
assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
fsl,dte-mode;
linux,rs485-enabled-at-boot-time;
rs485-rx-during-tx;
status = "okay";
};
As we see, CTS and RTS are swithed. So I checked with a logic Analyzer.
[upload|kgCzPbXCN6MTp20f+gf32+xzA14=]
Checking with logic Analyzer, I discovered that the Toradex Pinout Designer was right and the arch/arm/boot/dts/imx7d-pinfunc.h is wrong. I assume Toradex has corrected this without changing code provided by NXP. Am I right ?