I have a differential MCLK signal coming in to TS_DIFF13+ and TS_DIFF13- (pins 133 and pins 131 respectively)
Pins 133 and 131 go to the PCIe subsystem and serve the PCIe clocking. I don’t know if the i.MX6 HW allows to output an arbitrary frequency on those pins but I’m sure there is no driver available which would allow you to configure such thing should it be needed.
The MCLK usually is a clock which goes to the codec and not considered part of the I2S communication.
I usually recommend to use an external oscillator for an external Audio Codec. One less high speed signal to route.
You could use pin 194 DAP1_MCLK as a MCLK ouput should you chose to use the module as a clock source.
Note that the CCM_CLKO1 function is also used on another pin for the on module codec. So on top of the limited different frequencies that the i.MX 6 can generate for CLKO1 you’re further limited to 24MHz that we need for the internal codec.
P.S. Is there a reason why you want to use an I2S on the UART3/UART4 pins rather than taking the pins which in the Apalis standard are meant for that purpose. i.e. 194/196/198/200/202/204. Should you ever want to use another member of the Apalis family chances are much higher that your carrier board does not need a redesign that way.
The following resources might be usefull:
Apalis iMX 6 Datasheet
Carrier Board Design
Apalis Family Whitepaper