A customer is trying to use the external memory bus on the Colibri iMX7D to interface with a PC-104-like bus.
He’s configured the WEIM registers according to the i.MX 7Dual reference manual:
CS0GCR1 reset = 0001_0080h
CS0GCR1 = 0x00210089
0000-0000-0010 0001-0000-0000-1000-1001
0 CSEN: CS Enable
1 SWR: Synchronous Write Data
2 SRD: Synchronous Read Data
3 MUM: Multiplexed Mode
4 WFL: Write Fix Latency
5 RFL: Read Fix Latency
6 CRE: Configuration Register Enable
7 CREP: Configuration Register Enable Polarity
10-8 BL: Burst Length
11 WC: Write Continuous
13-12 BCD: Burst Clock Divisor
15-14 BCS: Burst Clock Start
18-16 DSZ: Data Port Size
19 SP: Supervisor Protect
22-20 CSREC: CS Recovery
23 AUS: Address UnShifted
26-24 GBC: Gap Between Chip Selects
27 WP: Write Protect
31-28 PSZ: Page Size
CS0GCR2 reset = 0000_1000h
CS0GCR2 = 0x00001130
0000-0000-0000 0000-0001-0001-0011-0000
1-0 ADH: Address hold time
3-2 Reserved: This read-only field is reserved and always has the value 0.
7-4 DAPS: Data Acknowledge Poling Start.
8 DAE: Data Acknowledge Enable.
9 DAP: Data Acknowledge Polarity.
11-10 Reserved: This read-only field is reserved and always has the value 0.
12 MUX16_BYP_GRANT: Muxed 16 bypass grant.
31-13 Reservado: This read-only field is reserved and always has the value 0.
CS0RCR1 reset = 0000_0000h
CS0RCR1 = 0x0e291111
0000-1110-0010 1001-0001-0001-0001-0001
2-0 RCSN:
3 Reservado: This read-only field is reserved and always has the value 0.
6-4 RCSA:
7 Reservado: This read-only field is reserved and always has the value 0.
10-8 OEN:
11 Reservado: This read-only field is reserved and always has the value 0.
14-12 OEA:
15 Reservado: This read-only field is reserved and always has the value 0.
18-16 RADVN:
19 RAL:
22-20 RADVA:
15 Reservado: This read-only field is reserved and always has the value 0.
29-24 RWSC:
31-30 Reservado: This read-only field is reserved and always has the value 0.
CS0RCR2 reset = 0000_0000h
CS0RCR2 = 0x00000000
0000-0000-0000 0000-0000-0000-0000-0000
2-0 RBEN:
3 RBE:
6-4 RBEA:
7 Reservado: This read-only field is reserved and always has the value 0.
9-8 RL:
11-10 Reservado: This read-only field is reserved and always has the value 0.
14-12 PAT:
15 APR:
31-16 Reservado: This read-only field is reserved and always has the value 0.
CS0WCR1 reset = 0000_0000h
CS0WCR1 = 0xc7249249
1100-0111-0010 0100-1001-0010-0100-1001
2-0 WCSN:
5-3 WCSA:
8-6 WEN:
11-9 WEA:
14-12 WBEN:
17-15 WBEA:
20-18 WADVN:
23-21 WADVA:
29-24 WWSC:
30 WBED:
31 WAL:
CS0WCR2 reset = 0000_0000h
CS0WCR2 = 0x00000000
0000-0000-0000 0000-0000-0000-0000-0000
0 WBCDD: Write Burst Clock Divisor Decremen
31-1 Reservado: This read-only field is reserved and always has the value 0.
Customer says that after applying these settings to the device tree, the WE# signal doesn’t show up on the write cycle.
He mentions table 9-31, which suggest some settings to configure WEIM on Intel mode:
Table 9-31. Intel Mode pin connections
Arm platform Pin EIM Pin Notes
ADS# IPP_DO_ADV_B WAL = 1,RAL = 1
W/R IPP_DO_BE_B WBED = 1
WR# WE#
RD# OE#
Any clue on how to get this bus working with a PC-ISA or PC-104-like bus with OE, WR and CS signals?
I’m currently trying to get more info regarding the device tree and the application itself.