Hello Toradex Team,
I’m using IMX6ULL 256 MB V1.0A SoM with console image version 2.8b.
I have disabled the LCD driver and configured the pins as GPIO. But am facing issue with SODIMM Pin 71 (JTAG_TMS gpio1io11) and SODIMM 131 (SNVS_TAMPER5 gpio5io5). I have disabled their default configuration in the device tree and configured it as gpio in my device tree. The problem is that I want to use SODIMM Pin 71 as Output pin, but the pin is getting configured as Active High.I am not able to change the state of the pin. It stays High even after changing the value. And SODIMM Pin 131 as Input pin, here too it is getting configured as Active High. So When I ground the Pin 131 it gives me Low state but when kept open it gives me High state. All other configuration that i am doing are getting configured as expected but only these pins are not.
Below is my edited dts file :
The Last 2 pins are the ones…
/dts-v1/;
#include "imx6ull-colibri-nonwifi.dtsi"
#include "imx6ull-colibri-eval-v3.dtsi"
/ {
model = "Toradex Colibri iMX6ULL 256MB on Colibri Evaluation Board V3";
compatible = "toradex,colibri_imx6ull-eval", "fsl,imx6ull";
gpio_additional {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_additionalgpio>;
status = "okay";
};
};
&lcdif {
status = "disabled";
};
&iomuxc {
pinctrl-names = "default";
imx6ull-eval-v3 {
pinctrl_additionalgpio: additionalgpios {
fsl,pins = <
MX6UL_PAD_LCD_DATA13__GPIO3_IO18 0X14
MX6UL_PAD_LCD_DATA14__GPIO3_IO19 0X14
MX6UL_PAD_LCD_DATA15__GPIO3_IO20 0X14
MX6UL_PAD_LCD_DATA16__GPIO3_IO21 0X14
MX6UL_PAD_LCD_DATA05__GPIO3_IO10 0X14
MX6UL_PAD_LCD_DATA17__GPIO3_IO22 0X14
MX6UL_PAD_LCD_DATA06__GPIO3_IO11 0X14
MX6UL_PAD_LCD_DATA07__GPIO3_IO12 0X14
MX6UL_PAD_LCD_DATA08__GPIO3_IO13 0X14
MX6UL_PAD_LCD_DATA12__GPIO3_IO17 0X14
MX6UL_PAD_LCD_DATA09__GPIO3_IO14 0X14
MX6UL_PAD_LCD_DATA01__GPIO3_IO06 0X14
MX6UL_PAD_LCD_DATA02__GPIO3_IO07 0X14
MX6UL_PAD_LCD_DATA03__GPIO3_IO08 0X14
MX6UL_PAD_LCD_DATA04__GPIO3_IO09 0X14
MX6UL_PAD_LCD_HSYNC__GPIO3_IO02 0X14
MX6ULL_PAD_BOOT_MODE0__GPIO5_IO10 0x14
MX6ULL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x14
MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0x14
MX6UL_PAD_NAND_CE1_B__GPIO4_IO14 0x14
MX6ULL_PAD_BOOT_MODE1__GPIO5_IO11 0x14
MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0X14
MX6UL_PAD_JTAG_TMS__GPIO1_IO11 0X14
>;
};
};
};
I have also removed the pinctrl_gpio_bl_on: gpio-bl-on node for Pin 71 and
commented out the MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x14 from pinctrl_snvs_hog_1: snvs-hoggrp-1 for pin 131.
Please let me know what can be done.
Thanks…