Hi @abhiarora,
Please read the Colibri design guide and the layout design guide available on our developer website:
Please find the details below:
The Colibri iMX6ULL has seven 3.3V pins. However, viola reference design has only 4 decoupling capacitors? Can someone explain that to me?
The 4 capacitors with specified values are good to provide the instantaneous power required by Colibri module.
Can I add Blinking LED to any pin? Do we have a provision to enable or define a blinking led pin in BSP or in any Software?
No, you can write a small code for blinking LED.
I have removed Jumper and resistor R73. I have placed a trace in place of resistor R74 (These designator belong to Viola reference design). Can someone verify my Ethernet design as I want to use only Colibri iMX6ULL board?
Follow the recommended circuit as adviced you earlier, The current circuit hold good for the Ethernet PHY used on the module. In future, we may have to move to voltage mode PHY on the module, which may require different biasing. If you are not using the recommended assembly, you may have to redesign the section of the board under such situations.
I have placed stitching capacitor in my design. I have placed 8 100nF 0603 caps. Any better idea on stitching caps values and placement?
Why do you need them? Any specific situation where you want to use them? Stitching caps may or may not be required. It is dependent on PCB layout and how you are routing the signals.
I am not using Resistor Array/bank for SD and SPI interface. I don’t think it will cause any problem as long as length is matched and distance between traces is enough. Am I right?
Series resistors are adviced to be used. Length matching is not necessary for SPI or SDIO. Are you sure matching length on carrier board will result in length matched traces for the interface (module + carrier board)?
I have added JTAG connector in my board. I am using Segger Jlink. It’s pinout is over here. You can find the JTAG connector in extension connector page. I have few questions for my JTAG design.
a. JTAG requires VREF_JTAG. Do I need to connect it to 3.3V?
Yes
b. Colibri iMX6ULL has MOD Pin. It is not required in Segger JLink Connector. What should I do with it?
That a strapping signal. The signal is pulled down on the module using a 10K resistor. You can add a header/ Jumper on your carrier board to pull up the signal if you want to enter boundary scan mode.
c. Segger Jlink has one output pin for System Reset. I have connected it to RESET_EXT#. Is it fine?
Since we have not tested it. I would recommend you to add assembly option to connect/disconnect the JLINK reset from the RESET_EXT# signal.
d. I don’t have any series resistor in between JTAG connector and Colibri pins. Is it fine?
Should be fine
e. Segger JLink connector has RTCK pin. However, iMX6ULL doesn’t have such pin. I have grounded that pin. Is it fine?
Leave that pin unconnected OR use 0R resistor series resistor to connect the signal to GND. For more details, refer following article: Documentation – Arm Developer
Regards,
Satyan