Colibri iM6Ull 512

Dear Team,
We are using colibri imx6ull 512, and using the linux 5.4 as OS

Our project requirement is that we will read the external ADC over SPI where we have to collect 7500 samples per second

iM6ULL 512 is the SPI master and ADC is the slave (SPI speed @ 20 Mbps single channel 24 bit)

For this we use the timer interrupt for the duration of (1/7500) and read the ADC in the interrupt but sometimes the ADC function took 61 usec (micro seconds) and sometime it took 291 us, so complete one sample got missed

Problem statement:
iM6ULL 512 could not read the 7500 samples per second and instead of that it will read 7100 to 7400 samples per second, so it will missed many samples
Actual ADC_Read function function took 61 usec (micro seconds) and sometime it took 291 us, so complete one sample got missed

We need to read all 7500 samples per second i.e. after every 134 us iMX6ULL 512 should read ADC samples from ADC over SPI

Please suggest some solution to overcome this problem


7500 per second is very high interrupt rate for Linux, at lest too high for iMX6ULL. The best you could do, if your ADC allows - reduce SPI clock and try receiving several samples in one long SPI transfer, reducing this way interrupt rate to be less than 1k. If you can’t do it this way, then think about external MCU to collect real time data, or perhaps about upgrade to Cortex-M equipped Colibri. Collect high interrupt data on Cortex-M, transfer at 1k or less to Cortex-A.

Although the iMX6ULL hardware is certainly capable of collecting 7500 samples per second, such a high interrupt rate is too demanding for Linux and, as Edward already mentioned, it will not allow the OS to function properly. Could you please describe your situation in more detail so that we can attempt to provide an alternative solution?

Our system has 2 peripherals
1 is ADC which reads data over spi @7500 samples per second continuously
2 is 1 uart @115200 modbus over RS485

After collecting the ADC samples in buffer 1, we will do FFT of last 60000 samples and other algorithm, and also we should read the ADC data buffer 2, so that no data will loose, FFT will work in a sliding window of last 60000 samples
Modbus at speed 115200, 2 transaction per second is ok for us

The revised sentence would be: "Unfortunately, fulfilling such requirements is very challenging on an iMX6ULL SoC running Linux. You might be able to create a kernel driver to collect 7,500 samples per second, but this could significantly slow down the system and potentially lead to instability. As @Edward suggested, you could either add a microcontroller to your PCB to collect ADC data and run FFT, then send the results to iMX6ULL via SPI/I2C/UART, or you could use the Colibri iMX7 or Colibri iMX8, which have an additional Cortex-M core along with A core(s). On these, you can run FreeRTOS to collect ADC data and run FFT. A third option, if you don’t require Linux, is to run FreeRTOS directly on the iMX6ULL

We dont required the linux, so please let us know how we can go ahead with the FreeRTOS on iMX6ULL

Hi @Ashish,

Please note Toradex do not provide or support running FreeRTOS on application processor like iMX6ULL.
You may like to check with NXP if they provide FreeRTOS for iMX6ULL.

Best Regards
Ritesh Kumar

You can download the SDK2.2_iMX6ULL_WIN and use with the NXP MCUXpresso IDE. As Ritesh mentoned Toradex does not support the Free RTOS on Colibri IMX6 ULL, so please use NXP support and/or NXP community.

Thanks Alex
Is pin out for iMX6ULL 512 and iMX7 is same, as we already made our hardware based on the iMX6ULL 512, so if the pin our are same then we can use iMX7 which has two cores


You meant iMX7. iMX7 has up to 2 Cortex-A cores, which are good for Linux, and Cortex-M core, on which you can (simultaneously with Linux) run FreeRTOS or your bare metal application. I suggested you previously upgrading to iMX7 just because it has Cortex-M, which is nice to solve real time issues. Toradex supports? FreeRTOS on iMX Cortex-M cores. Please check related articles in knowledge base.

If you don’t need Linux, then NXP SDK for iMX6ULL perhaps is a way to go.

Xenomai, ARM FIQ interrupt handler perhaps could help as well solving iMX6ULL RT issues.

There’s no easy and simple solution for you, all choices have steep learning curve.

Thanks for the reply
Also is sodimm pins of both iMX6ULL and iMX7 are same or any difference, please let me know

Hi @Ashish,

Electrically Colibri family pins are compatible that said it do depends what all features you are using with Colibri iMX6ULL. If you have used any SOC specific feature that may not be available on same pin with Colibri iMX7.
You can take help of pinout designer tool to further check in detail

Best Regards
Ritesh Kumar

Strictly speaking pins are not the same. Though Toradex did nice job making modules in the same family like Colibri as mach as possible compatible, unfortunately SOCs are not the same, some pins on one SOC have functions not present on SOC in another Colibri flavor. Please check your Colibri datasheets.

I guess your SPI ADC application needs some GPIO for start of ADC sampling? Try to avoid using GPIO function on Cortex-M. It is not simple to share GPIO pins (not pin functions like RS232 Tx) between Cortex-M and Linux on Cortex-A. The simplest is to eliminate whole GPIO bank (32 GPIO pins) from Linux, which is not easy at all since Linux uses many GPIO pins with something like SD card detection etc. So you’ll have a piece of work figuring which GPIO bank to disable on Linux without breaking all other your application requirements.