Clock is Not generating on Audmux 5 port(200 & 194 pins) on Apalis Imx6(Eval_1.0 development board)

Technical Support
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1

Hi we are working on Apalis Imx6q V1.0. we have a question that we tried to find out but some how we not able to solve it.

and also we did some registers modification using memtool by running this shell script.
/unit_tests/memtool -32 0x020C8078=0x00011006

/unit_tests/memtool -32 0x020C8074=0x00011006

/unit_tests/memtool -32 0x020C401C=0x00900000

/unit_tests/memtool -32 0X020C4028=0x0EC102C1

/unit_tests/memtool -32 0x020C4060=Ox000000fb

/unit_tests/memtool -32 0x0202801C=0x00000200

/unit_tests/memtool -32 0x02028020=0x00000200

/unit_tests/memtool -32 0x02028010=0x00000000

/unit_tests/memtool -32 0x020c817c=0x00672f67

/unit_tests/memtool -32 0x020c8174=0x00672f67

/unit_tests/memtool -32 0x020c8178=0x00672f67

so coming to the main point at last, we are not able generate Bit_clock(194 pin) and MCLK(200 pin) but it is showing pure DC with some voltage on oscilloscope and sometimes it get increase by few volts after running this script(this happens some times only), please let me know that if my path is correct or not to generate the clock across the BIT_CLK and MCLK in Apalis imx6 Eval v1.0 board
thank-you

2

hi

Could you provide the version of the software of your module? Which carrier board are you using?

What are you trying to do with this memtool? What are you expecting to get on the output of Pin194 and pin 200?

Best regards, Jaski

3

thanks @jaski.tx for you response i am able to generate clock on bit_clk(sys_clk) and mclk as i wanted, i have modified registers configuration by running a script and also did changes in dtsi file, and after that it works.

4

Perfect, that it works. Thanks for the feedback.

Please note, For the production, you should not write values to registers for pin muxing and clock generation but rather use the dts files.