Using Rpmsg library on WinCE 6 it’s quite easy to load a simple firmware in M4 core and start the execution (Colibri Vf61 module).
If the firmware uses FreeRTOS, it enables and uses (at least) SysTick and PendSV.
When A5 starts M4 for the first time, the secondary core starts from a “clean” condition and (probably) everything works fine.
But this is not 100% sure, because if (for any reason) M4 is in a “dirty state” (as an example: either with some pending interrupts or SysTick enabled) a lot of problems can happen. As an example SysTick_Handler can call xTaskIncrementTick() before the whole FreeRTOS has been fully initialized.
This is only an example, but it’s hard to say which kind of “dirty states” can be generated for M4.
Another possible scenario: I want to load a firmware to M4, run it, then load another firmware. I must be sure that M4 core start from a known condition.
Reading this topic on NXP Community it seems that it’s not possible to reset M4 core from A5 and complicates really much the situation.
Which is the right way to have a “clean start” of M4 core?
Which registers should I set to a known state before start the M4 clock?
Does Rpmsg library take care of this need?
Probably this is ad advanced usage of the Vybrid, and it’s not easy to explain what happens, but if you need you can send me a private message and I can give more details.