On page 2564 of the reference manual for the i.MX7D section 9.7.4 tells that there are 4 configurations supported for the Chip Select mapping. However, there are 6 CSnGCR1 registers, each woth a CSEN field to enable a chip select.
Are there 2 additional Chip Select registers for compatibility issues (so the first 4 CSEN mapping each of the 4 CS) or there is something else I missed?
