Carrier Board Layout Confirmation


I’m just about finished with the schematics for my custom Apalis carrier board, and am hoping to have some input regarding my proposed board layout from an embedded engineer more experienced than myself. To begin with, here’s the proposed layout:

A couple of notes on the layout:

  1. Connector 1 and Connector 2 provide both power and signals to the board, and their position is a hard requirement (i.e. they cannot be moved).
  2. All other components can be moved as recommended.
  3. Everything to the left of the red line is analogue, everything to the right is digital.
  4. The 2 ADCs straddle the analogue/digital line, with their analogue and digital pins on the respective side of the line.
  5. This is a 4 layer board (Component/Signal, GND, Power, Signal). The GND plane is a continuous solid, with the analogue/digital line representing a theoretical split in the plane only (i.e. there are no cuts, splits, etc. in the GND plane to separate the analogue and digital GNDs).
  6. Components are only to be placed on the top surface.
  7. The analogue components are powered by a separate analogue supply (bottom left corner).
  8. The ‘Power Supply and Filtering’ uses various protection diodes, CLC filters and buck/buck-boost converters to provide the board with the required 12V, 5V and 3V3 sequenced supplies.
  9. The MCU does the majority of the computation and speaks with the Apalis CoM via a direct ethernet connection.
  10. Not shown are WiFi/Bluetooth and CAN hardware.

My major considerations in the layout are as follows:

  1. Separation of analogue and digital circuits to minimise crosstalk and EMI.
  2. Careful planning of current return paths, accounting for both low frequency/DC return paths (i.e. least resistance point to point) and high frequency return paths (i.e. least impedance following the signal trace).

Does the above make sense and is it a reasonable layout? As mentioned above, with the exception of Connector 1 and 2, I am free to move components/modules around as needed.


Dear @jars121,

from what I can see from the block diagram and what you wrote, you are considering all the aspects to get a proper layout.

If not done already, I would recommend you to have a look at our layout design guide:

Please check what are the requirements for the interfaces you are planning to use. This could give you some limitations on the component placement.

I suspect that, anyway, you are quite familiar with all the concepts mentioned in this guide!

Regarding the WiFi, please keep it far from noise sensitive areas and follow the manufacturer layout recommendations for the RF area, if you are planning to have also the antenna on the PCB.

Thanks as always @diego.tx, your input is greatly appreciated. I have read through the layout guide, but it’s been a little while so I’ll go through it again. I’m using an external antenna for the WiFi/Bluetooth, but I’ll review the recommended layout details very carefully regardless. As you said, I feel like my approach is relatively considered/researched, I just wanted to make sure there were no glaringly obvious mistakes :slight_smile: Thanks again!