Hi,
I am working on the Toradex Verdin i.MX95 19x19 board. On this board I see that there are two CAN interfaces present which are connected to headers J26 and J27. One of the FlexCAN interfaces gets automatically enabled and works without any additional configuration. However, when I try to enable the second CAN interface, I am facing issues.
Initially, I was trying to find the schematic of the board and the i.MX95 Applications Processor Reference Manual, but I was not able to locate them. If possible, could someone please share the correct links for the schematic and the processor reference manual, especially the sections related to register information and pin configuration.
Then I started investigating the DTB to understand how the CAN controllers are configured. In the DTB I found the following pinctrl groups:
flexcan1grp {
fsl,pins = <0x1e0 0x3e4 0x00 0x06 0x00 0x39e 0x1e4 0x3e8 0x408 0x06 0x00 0x39e>;
phandle = <0x54>;
};flexcan2grp {
fsl,pins = <0x74 0x278 0x00 0x02 0x00 0x39e 0x7c 0x280 0x444 0x02 0x02 0x39e>;
phandle = <0x32>;
};
Based on the phandle mapping, I found that these correspond to the following CAN controller nodes:
flexcan1 = “/soc/bus@44000000/can@443a0000”; → flexcan1grp
flexcan2 = “/soc/bus@42000000/can@425b0000”; → flexcan2grp
When I inspected the flexcan2 node, I observed that it is already enabled and configured correctly:
can@425b0000 {
compatible = “fsl,imx95-flexcan”;
reg = <0x425b0000 0x10000>;
interrupts = <0x00 0x26 0x04>;
clocks = <0x11 0x77 0x11 0x78>;
clock-names = “ipg\0per”;
assigned-clocks = <0x11 0x78>;
assigned-clock-parents = <0x11 0x0a>;
assigned-clock-rates = <0x2625a00>;
fsl,clk-source = [00];
status = “okay”;
pinctrl-names = “default”;
pinctrl-0 = <0x34>;
xceiver-supply = <0x35>;
phandle = <0xed>;
However, when I checked the flexcan1 node, I found that it is disabled by default:
can@443a0000 {
compatible = “fsl,imx95-flexcan”;
reg = <0x443a0000 0x10000>;
interrupts = <0x00 0x08 0x04>;
clocks = <0x11 0x2b 0x11 0x2c>;
clock-names = “ipg\0per”;
assigned-clocks = <0x11 0x2c>;
assigned-clock-parents = <0x11 0x0a>;
assigned-clock-rates = <0x2625a00>;
fsl,clk-source = [00];
status = “disabled”;
pinctrl-names = “default”;
pinctrl-0 = <0x54>;
xceiver-supply = <0x55>;
phandle = <0x10d>;
};
To enable flexcan1, I modified the imx95-19x19-verdin.dts located at:
bld-xwayland/tmp/work-shared/imx95-19x19-verdin/kernel-source/arch/arm64/boot/dts/freescale.
and added the following nodes at the bottom of the DTS file:
&micfil {
status = “disabled”;
};
&flexcan1 {
status = “okay”;
};
Note: The reason I disabled micfil is because both micfil and flexcan1 appear to share the same pinmux, and by default micfil is enabled.
After rebuilding and booting the system, I observed the following error in the logs:
root@imx95-19x19-verdin:~# dmesg | grep -i can
[ 0.583426] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
[ 0.596405] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
[ 0.609405] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
[ 0.622406] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
[ 6.355962] systemd[1]: xen-qemu-dom0-disk-backend.service: Cannot add dependency job, ignoring: Unit xen-qemu-dom0-disk-backend.service has a bad unit file setting.
[ 7.287776] can: controller area network core
[ 7.293227] NET: Registered PF_CAN protocol family
[ 7.301419] can: raw protocol
[ 9.019002] CAN device driver interface
[ 9.099666] flexcan 443a0000.can: Error applying setting, reverse things back
[ 9.124995] clk: failed to reparent can1 to syspll1_pfd1_di: -1
[ 9.157939] Modules linked in: snd_soc_fsl_sai(+) flexcan(+) ap1302 snd_soc_wm8904(+) snd_soc_fsl_utils imx_pcm_dma rpmsg_ctrl can_dev rpmsg_char pwm_fan can_raw can fuse
[ 9.173172] pc : flexcan_read_le+0x0/0x18 [flexcan]
[ 9.173189] lr : flexcan_probe+0x398/0x798 [flexcan]
[ 9.225885] flexcan_read_le+0x0/0x18 [flexcan]
[ 9.225955] flexcan_driver_init+0x20/0x1000 [flexcan]
Then I attempted another modification by removing the inherited clock assignments for flexcan1:
&micfil {
status = “disabled”;
};
&flexcan1 {
status = “okay”;
/* Forcefully clear the inherited clock assignments by setting them to empty */
assigned-clocks = <>;
assigned-clock-parents = <>;
assigned-clock-rates = <>;
};
However, even after this modification I still see errors during boot:
root@imx95-19x19-verdin:~# dmesg | grep -i can
[ 0.587660] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
[ 0.600645] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
[ 0.613644] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
[ 0.626638] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
[ 6.350338] systemd[1]: xen-qemu-dom0-disk-backend.service: Cannot add dependency job, ignoring: Unit xen-qemu-dom0-disk-backend.service has a bad unit file setting.
[ 7.300235] can: controller area network core
[ 7.305704] NET: Registered PF_CAN protocol family
[ 7.313915] can: raw protocol
[ 9.122141] CAN device driver interface
[ 9.167331] flexcan 443a0000.can: Error applying setting, reverse things back
[ 9.195601] Modules linked in: snd_soc_wm8904(+) ap1302 snd_soc_fsl_sai(+) snd_soc_fsl_utils flexcan(+) imx_pcm_dma can_dev rpmsg_ctrl rpmsg_char pwm_fan can_raw can fuse
[ 9.232216] pc : flexcan_read_le+0x0/0x18 [flexcan]
[ 9.232238] lr : flexcan_probe+0x398/0x798 [flexcan]
[ 9.358362] flexcan_read_le+0x0/0x18 [flexcan]
[ 9.358432] flexcan_driver_init+0x20/0x1000 [flexcan]
My use case is to enable and use both CAN interfaces (CAN1 and CAN2) on the Cortex-A55 core.
Is there any restriction on using both CAN controllers simultaneously on the A55 core on this platform? If not, could you please guide me on the correct way to enable the second CAN interface?
Also, if possible, please share the schematic and reference documentation where I can find the detailed register information and pin configuration for these CAN interfaces.
Any guidance would be greatly appreciated. Thank you.
