Bad SPI Clock on higher frequencies


I am having some trouble with the SPI when using high frequencies. By default, the SPI max frequency is set to 23MHz. However the i.MX7 datasheet says that the SPI supports up to 52MHz. So, I increased this max frequency in the device tree to this maximum with the patch below:

--- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
@@ -122,7 +122,7 @@
 	spidev0: spidev@0 {
 		compatible = "toradex,evalspi";
 		reg = <0>;
-		spi-max-frequency = <23000000>;
+		spi-max-frequency = <52000000>;
 		status = "okay";

However, after increasing this frequency on my code I started to have bad transmissions. If I keep the max frequency below 20 and 29 MHz, the SPI frequency stays the same and consistent at 20MHz:


However, if I increase this value, the clock gets all messed up, like in the images below:



I understand that the SPI at high frequencies can be unreliable, but should’t the clock be consistent and just the transmission suffer from interference? In my case I am measuring the clock directly on the Iris board pins.

Hi @farina!

What is the sample rate you’re using to capture the clock waveform? This is crucial considering the Nyquist theorem.

Is there a threshold frequency where the waveform starts to appear messed up?

Note that the clock signal can also suffer from interference since it’s actually connected to the SPI peripheral and thus is subject to EMI especially in higher frequencies.

Hello @gustavo.tx

I’m sampling at 250 MS/s, so this shouldn’t be the problem.

I started noticing it when I go from 29MHz to 30MHz…

However from 20MHz to 29MHz there is no change at the frequency and it stays at 20MHz. When I select 30MHz I start to noticing some changes on the frequency, but I can’t say if this is caused due to interference or if the peripheral is really trying to increase the clock frequency…

One thing that I was wondering was if is there some fixed frequency values for the SPI. I know that in some SPI peripherals, after some point, you can only increase it to some specific values… but I couldn’t find anything about this for this one… If that’s the case and my problem really is interference, maybe I can find an intermediate frequency that can be enough for what I need…

Hi @farina

As you might know, we are currently doing home-office and not having any oscilloscope available.
Next week, I will go to the office and then I could try to reproduce this issue. Thanks for your patience.

Best regards,

Hello @jaski.tx

No problem!

Hi, Farina,
I want to underline what gustavo said. (EMI and signal integrity).

Hi @farina

I did the measurement with an oscilloscope having 2.5GS/s and 1M sample points and using passive probe. Starting from a frequency of 30MHz, the signal becomes almost triangle. Thus increasing frequency did not help further. I will do the measure with active probe tomorrow.

Best regards,

Hi @jaski.tx , @marvin.tx used to help test 60MHz SPI clock on Colibri iMX8X here. It is also almost triangle. Adding a pull-up resistor could make the clock signal a little better but not obviously. That Colibri iMX8X customer finally gets it working by designing their own carrier board and carefully routing SPI interface. On Iris board, connection e.g. dupont cables is sensitive to SPI when it works at high clock frequency.

HI @farina

Is this answer OK for you?

Best regards,

Hi @farina

The Documentation of the SoC iMX7 is very generic. For the correct speed calculation of Spi Transfer, one needs to consult the section of the datasheet, which describes the SCLK Cycle. The read timing for the master mode is 43 ns, which results in 23 Mbit/s for maximum frequency of SCLK.

Please have a look here too.

Best regards,


That was exactly what I was looking for!


You are welcome.

Best regards,