Apalis T30 JTAG TDO stays LOW

I have been trying to connect to JTAG port on Apalis evaluation board( T30 module) but the module seems to be unresponsive, I have followed all the instructions mentioned on the developer page The TDO pin seems to stay constantly low (even though the debugger is sending in a test signal on TDI) and I cannot get a clock setup for the JTAG connection. how do I fix this? is JTAG debugging locked by default?!

What exact versions of things are you talking about?

T30 module Apalis T30 2GB, V1.1A 02716507
Apalis evaluation board V1.1A 00000379
still has the embedded linux that it came with ( apalis_t30_linuximageV2.4_20150518)

JTAG debugging is not locked by default and this really should work just fine but one does have to use the Lauterbach diag hack as mentioned for Apalis TK1 on the developer website article you referred to (of course adjusted to whatever relevant SoC stuff). Other than that I guess you may include more information about the exact Lauterbach stuff you are trying this with. There may also be something about this ancient long since unsupported BSP release which you are trying this with. However as JTAG debugging is not exactly something we usually do on a daily base I would have to dig out our probe and try it again to tell you much more.