According to imx8qxp-apalis.dtsi, one of the GPIO line names assigned to lsio_gpio3 is “MXM3_110”. By counting, the pin given this name is line 10 of gpiochip 3, i.e. GPIO3.IO10. According to both the Apalis iMX8X datasheet and Toradex Pinout Designer, however, GPIO3.IO10 is on MXM3 148 instead.
Following this trail, one of the GPIO line names assigned to lsio_gpio4 is “MXM3_148”. Again, by counting, the pin given this name is line 20 of gpiochip 4, i.e. GPIO4.IO20. There is such a pad in pads-imx8qxp.h, which is IMX8QXP_USDHC1_VSELECT_LSIO_GPIO4_IO20, but this pad does not seem to be exposed on the MXM3 connector.
I’m planning to fix this locally by changing lsio_gpio3 line name “MXM3_110” to “MXM3_148”, then changing lsio_gpio4 line name “MXM3_148” to “”. Would this be correct, or is there something I’ve overlooked?