How can I configure the PCIe interface of the Apalis iMX8QM V1.0B to operate in endpoint mode?
That is, the Apalis would be an endpoint in a system with another device as the root complex.
How would I supply a PCIe reference clock to the Apalis?
It does not appear that there is an option to supply a PCIe reference clock to the Apalis iMX8QM module, so that eliminates the possibility of using the PCIe Common Clock Architecture.
Does the Apalis module have a PCIe reference clock with better than ±300 ppm frequency accuracy and 0.7 ps jitter? If so, then the PCI-e Separate Reference Clock Architecture could be used.
Yes, we are using an on-module Microchip DSC557-03, Crystal-less Two Output PCIe Gen1/2/3 Clock Generator.
Thanks for the response!
Can the PCIe Root Complex versus Endpoint mode be selected at boot time? We’d like to use a GPIO to select which mode the iMX8QM comes up in.
You are very welcome.
Very good question. However, I don’t think so far anybody even tested any kind of endpoint operation at all. The only thing I know is that we have customers who successfully run such configuration on the Apalis iMX6. In theory, their PCIe IP is similar so you may give the following driver a try:
Good luck!
Hi Enna,
Were you able to turn the iMX8 into an End Point, and what are the bandwidth limit ?
I do not need to select it at boot time, but I cannot find the information anywhere (cf NXP forum : Re: IMX8M- MINI PCIe throughput ? - NXP Community ).
Best regards