Dear all,
After succesfully config UART2 as simple uart without rts and cts, we are changing the functionality of several peripherals to be GPIOs.
As can be seen in the device tree overlay we have disbled many modules. We have several issues with the gpios, because we can manage a few but many are not changing their state.
The module LCD is disabled and we manage pin 251, 253, but we are not able to manage pin 255,257,259,261.
The module MMC1 is disabled and we are not able to manage any pins, in particulary we focus in pin 152,156,158
The Device Tree overlay file is compiled correctly and also is load by the uboot. The pins are managed by the gpioset command, like gpioset 1 2=0. The command is accept and any message is shown, but the state of the pin is not changed.
Please could you give some advice to get those GPIOs availables?
Thank you
Our hardware is:
Apalis iMX6D 1GB IT
Custom board base in Apalis Eval Board v1.1
Linux apalis-imx6-10806407 6.1.22-6.2.0 (Reference image Apalis-iMX6_Reference-Multimedia-Image-upstream)
/dts-v1/;
/plugin/; //Indicates a Device Tree Overlay
// Header file with pin definitions
#include <imx6dl-pinfunc.h>
/ {
compatible = "toradex,apalis_imx6q";// Set hardware compatibility
backlight: backlight {
status = "disabled";
};
lcd_display: disp0 {
status = "disabled";
};
panel_dpi: panel-dpi {
status = "disabled";
};
panel_lvds: panel-lvds {
status = "disabled";
};
};
&audmux {
status = "disabled";
};
&can1 {
status = "disabled";
};
&can2 {
status = "disabled";
};
&pcie{
status = "disabled";
};
&ipu1_csi1 {
status = "disabled";
};
&ldb {
status = "disabled";
};
&mipi_csi {
status = "disabled";
};
&mipi_dsi {
status = "disabled";
};
&pwm1 {
status = "disabled";
};
&pwm2 {
status = "disabled";
};
&pwm3 {
status = "disabled";
};
&pwm4 {
status = "disabled";
};
&sata {
status = "disabled";
};
&sound_spdif {
status = "disabled";
};
&spdif {
status = "disabled";
};
&usdhc1 {
status = "disabled";
};
&usdhc2 {
status = "disabled";
};
&ssi1 {
status = "disabled";
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_custom>; // Pin group available in userspace i.e. as GPIO
pinctrl_gpio_custom: gpiocustom {
fsl,pins = <
MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x130b0 /* SODIMM 2 */
MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x130b0 /* SODIMM 4 */
MX6QDL_PAD_SD4_DAT1__GPIO2_IO09 0x130b0 /* SODIMM 6 */
MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x130b0 /* SODIMM 8 */
MX6QDL_PAD_SD4_DAT5__GPIO2_IO13 0x130b0 /* SODIMM 128 */
MX6QDL_PAD_SD4_DAT6__GPIO2_IO14 0x130b0 /* SODIMM 130 */
/* MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x130b0 /* SODIMM 148 */
MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x130b0 /* SODIMM 152 */
MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x130b0 /* SODIMM 156 */
MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x130b0 /* SODIMM 158 */
/* MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x130b0 /* SODIMM 164 */
MX6QDL_PAD_EIM_A21__GPIO2_IO17 0x130b0 /* SODIMM 251 */
MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x130b0 /* SODIMM 255 */
MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x130b0 /* SODIMM 259 */
MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x130b0 /* SODIMM 253 */
MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x130b0 /* SODIMM 257 */
MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x130b0 /* SODIMM 261 */
MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x130b0 /* SODIMM 16 */
MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x130b0 /* SODIMM 18 */
MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x130b0 /* SODIMM 114 */
MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x130b0 /* SODIMM 124 */
MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x130b0 /* SODIMM 122 */
MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x130b0 /* SODIMM 191 */
MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x130b0 /* SODIMM 193 */
MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x130b0 /* SODIMM 195 */
/* MX6QDL_PAD_CSI0_DAT12__GPIO5_IO30 0x130b0 /* SODIMM 187 */
/* MX6QDL_PAD_CSI0_DAT13__GPIO5_IO31 0x130b0 /* SODIMM 185 */
/* MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00 0x130b0 /* SODIMM 183 */
/* MX6QDL_PAD_CSI0_DAT15__GPIO6_IO01 0x130b0 /* SODIMM 181 */
/* MX6QDL_PAD_CSI0_DAT16__GPIO6_IO02 0x130b0 /* SODIMM 179 */
/* MX6QDL_PAD_CSI0_DAT17__GPIO6_IO03 0x130b0 /* SODIMM 177 */
/* MX6QDL_PAD_CSI0_DAT18__GPIO6_IO04 0x130b0 /* SODIMM 175 */
/* MX6QDL_PAD_CSI0_DAT19__GPIO6_IO05 0x130b0 /* SODIMM 173 */
>;
};
};