Analogue Camera Module ver. 2.0A with Apalis IMX6 - Vsync & Capture Artifacts [SOLVED]

Technical Support
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1

Hi,

I am using the Analogue Camera Module ver. 2.0A with the Apalis iMX6Q using the 2.6 Beta 2 release with support for ADV7280.

When capturing both PAL and NTSC signals, there are artifacts in the captured video. Sometimes they will consist of horizontal green lines. There are also vsync issues shown is the attached video.

I have tried two signal sources, both exhibit similar artifacts. I have noticed that the lines get more frequent if one or more of the CPUs are busy (even using a simple loop).

I have attached a recorded video with issue.

How can I capture without visual artifacts and correct vsync?

Thank you for your time.

Playback:

root@apalis-imx6:~# gst-launch-1.0 imxv4l2src ! imxv4l2sink
[  821.442907] ERROR: v4l2 capture: slave not found! V4L2_CID_HUE
[  821.449859] ERROR: v4l2 capture: slave not found! V4L2_CID_HUE
====== IMXV4L2SRC: 4.0.8 build on Jun 29 2016 15:51:54. ======
====== IMXV4L2SINK: 4.0.8 build on Jun 29 2016 15:51:54. ======
Setting pipeline to PAUSED ...
display(/dev/fb0) resolution is (1920x1080).
Pipeline is live and does not need PREROLL ...
Setting pipeline to PLAYING ...
New clock: GstSystemClock
[  821.536911] imx-ipuv3 2400000.ipu: IPU Warning - IPU_INT_STAT_5 = 0x00000001
v4l2sink need allocate 3 buffers.
[  821.696969] imx-ipuv3 2400000.ipu: IPU Warning - IPU_INT_STAT_5 = 0x00000001
[  821.776977] imx-ipuv3 2400000.ipu: IPU Warning - IPU_INT_STAT_5 = 0x00000001
[  821.817163] imx-ipuv3 2400000.ipu: IPU Warning - IPU_INT_STAT_5 = 0x00000001
...
^Chandling interrupt.
Interrupt: Stopping pipeline ...
Execution ended after 0:02:26.396809995
Setting pipeline to PAUSED ...
Setting pipeline to READY ...
[  967.942191] imx-ipuv3 2400000.ipu: IPU Warning - IPU_INT_STAT_5 = 0x00000001
Setting pipeline to NULL ...
Total showed frames (7224), playing for (0:02:26.415845494), fps (49.339).
Freeing pipeline ...

Recording:

root@apalis-imx6:~# gst-launch-1.0 imxv4l2src ! videoconvert ! queue ! jpegenc ! avimux ! filesink location=test.avi
[ 1008.647853] ERROR: v4l2 capture: slave not found! V4L2_CID_HUE
[ 1008.653900] ERROR: v4l2 capture: slave not found! V4L2_CID_HUE
====== IMXV4L2SRC: 4.0.8 build on Jun 29 2016 15:51:54. ======
Setting pipeline to PAUSED ...
Pipeline is live and does not need PREROLL ...
Setting pipeline to PLAYING ...
New clock: GstSystemClock
[ 1008.732254] imx-ipuv3 2400000.ipu: IPU Warning - IPU_INT_STAT_5 = 0x00000001
^Chandling interrupt.
Interrupt: Stopping pipeline ...
Execution ended after 0:00:06.943398068
Setting pipeline to PAUSED ...
Setting pipeline to READY ...
2

I could reproduce the issue here.

This seems to be caused by to much capacitive loading on the clock combined with cross talk onto the clock.
I could get a stable lock onto the frames and lines by either of the following measures:

  • using Ixora instead of the evaluation board → shorter traces on the PCB.
  • shortening of the IDC ribbon cable to about 5 cm.
  • increasing the ADV7180 drive strenght on the clock pin.
  • reducing the value of the series resistor in the clock signal on the ACA.

If you have the possibility to crimp an IDC connector then shortening the cable is the quickest and saves measure.

The drive strength can be set over I2C. For tests the following command line can be used:

root@apalis-imx6:~# i2cset -f 3 0x21 244 0x1d b

Increasing the drive strength can be integrated into the driver with this patch.

3

Great work Max, the patch has fixed it for me.

I appreciate the effort.

4

patching the driver works for me :slight_smile: thanks