AM62 Verdin: GPIO pins remain MUX UNCLAIMED / GPIO UNCLAIMED even after DT changes and hogging

Technical Support
1

Hardware / Environment

  • Board: Verdin AM62 (Colibri SoM, WiFi version) on a custom carrier board

  • Kernel: Reference Minimal Image (Toradex)

  • U-Boot: Using fdtfile=k3-am625-verdin-wifi-dev-new.dtb

  • Tools: gpioset, gpioget, gpioinfo, grep on /sys/kernel/debug/pinctrl/*/pinmux-pins

Goal

Reconfigure SODIMM pins 42, 44, and 46 (GPIO0_35, GPIO0_37, GPIO0_34) as plain GPIOs instead of their default peripheral functions (I²S2/McASP). Need them to toggle reliably via gpioset/gpioget.

Changes Tried

  1. Device tree pinmux group:

    pinctrl_i2s2_as_gpio: main-i2s2-gpio-pins {
    pinctrl-single,pins = <
        AM62X_IOPAD(0x0090, PIN_OUTPUT, 7)  /* GPIO0_35 - SODIMM 42 */
        AM62X_IOPAD(0x0098, PIN_OUTPUT, 7)  /* GPIO0_37 - SODIMM 44 */
        AM62X_IOPAD(0x008c, PIN_OUTPUT, 7)  /* GPIO0_34 - SODIMM 46 */
        AM62X_IOPAD(0x0088, PIN_OUTPUT, 7)  /* GPIO0_33 - SODIMM 48 */
    >;
    bias-pull-up; //Even without this
};

  2. Applied to &main_gpio0 (tried even without hogging):

    &main_gpio0 {
    pinctrl-names = "default";
    pinctrl-0 = <&pinctrl_i2s2_as_gpio>;
    status = "okay";
    gpio-line-names = "SODIMM_52", "", "", "SODIMM_56", "SODIMM_58", "SODIMM_60",
                      "SODIMM_62", "", "", "", "", "SODIMM_54", "SODIMM_64", "",
                      "", "SODIMM_174", "SODIMM_172", "", "", "", "", "", "",
                      "", "", "SODIMM_76", "SODIMM_21", "SODIMM_256", "SODIMM_252",
                      "SODIMM_48", "SODIMM_46", "SODIMM_42", "SODIMM_218",
                      "SODIMM_44", "SODIMM_189", ...;
    sodimm42_hog: sodimm42-hog {
        gpio-hog;
        gpios = <35 GPIO_ACTIVE_HIGH>;
        line-name = "SODIMM_42";
        output-low;
    };
    sodimm44_hog: sodimm44-hog {
        gpio-hog;
        gpios = <37 GPIO_ACTIVE_HIGH>;
        line-name = "SODIMM_44";
        output-low;
    };
};

  3. Rebuilt and deployed DTB

    • Placed at /boot/k3-am625-verdin-wifi-dev-new.dtb

    • Verified U-Boot is set:

      setenv fdtfile k3-am625-verdin-wifi-dev-new.dtb
saveenv

    • Checked /sys/firmware/fdt strings include sodimm42-hog and SODIMM_42.

  4. Verified file checksum differences (md5sum) to ensure new DTB was loaded.

  5. Tested with libgpiod:

    • gpioset 1 35=1 → error setting the GPIO line values: Device or resource busy

    • gpioget 1 34 → always 0

    • gpioinfo | grep SODIMM_42 → shows [used]

    • /sys/kernel/debug/pinctrl/.../pinmux-pins:

      pin 34 (PIN34): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 35 (PIN35): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 37 (PIN37): 600000.gpio (GPIO UNCLAIMED) function main-gpio0-36-default-pins

  6. Other checks done:

    • Used strings /sys/firmware/fdt to confirm DT contents.

    • Verified device tree includes my hog nodes.

    • Watched /sys/kernel/debug/pinctrl/*/pinmux-pins with watch, but no muxing change when toggling GPIO.

Current Behavior / Issue

  • Pins remain (MUX UNCLAIMED) or (GPIO UNCLAIMED) after boot.

  • Even hogged pins are marked [used] in gpioinfo but never get muxed to GPIO.

  • gpioset fails with Device or resource busy.

  • Other pins (e.g., GPIO0_40 with a simpler pinctrl) toggle correctly, so the subsystem works in general.

Questions for the Forum

  1. Is my hog placement or pinmux binding incorrect for AM62/Verdin?

  2. Do hogs inside &main_gpio0 fail to request muxing early enough—should they be under gpio@600000 instead?

  3. Is there another DT fragment (k3-am62-verdin-wifi.dtsi or similar) overriding my changes at boot?

  4. Any kernel configs or driver quirks for AM62 that prevent muxing unless a consumer explicitly requests the line?

  5. Recommended way to confirm at runtime which DTB is truly active (without dtc on target)?

Would anyone familiar with AM62x or Verdin DT overlays/hogs provide guidance on why these pins remain unclaimed even though the new DTB contains my changes?

2

Hi, I’m the Toradex AI Assistant.

I might make mistakes. Our support team will step in if needed. If I answered your question, please tick the “Solution” checkbox. For follow-up questions to me, please use @ToradexAI in your post.

Did you like my answer? :+1: :-1:

Based on your configuration for the Verdin AM62, there are several issues with your approach that need to be addressed for proper GPIO configuration.

Pin Configuration Issues

For AM6X based modules like the Verdin AM62, pin configuration requires specific steps that differ from your current implementation (1). The key issue is that you need to properly disable conflicting peripherals and ensure the pin controller configuration is correctly applied.

Correct Device Tree Structure

According to the Verdin AM62 datasheet, pins 42, 44, and 46 correspond to specific SoC functions that need to be properly configured (2). Here’s the correct approach:

1. Create the Pin Group

For AM6X based modules, you need to define the pin configuration in the main pin controller (1):

&main_pmx0 {
    pinctrl_sodimm_42_gpio: sodimm_42_gpio_grp {
        pinctrl-single,pins = <
            AM62X_IOPAD(0x0090, PIN_INPUT, 7) /* GPIO0_35 - SODIMM 42 */
        >;
    };
    
    pinctrl_sodimm_44_gpio: sodimm_44_gpio_grp {
        pinctrl-single,pins = <
            AM62X_IOPAD(0x0098, PIN_INPUT, 7) /* GPIO0_37 - SODIMM 44 */
        >;
    };
    
    pinctrl_sodimm_46_gpio: sodimm_46_gpio_grp {
        pinctrl-single,pins = <
            AM62X_IOPAD(0x008c, PIN_INPUT, 7) /* GPIO0_34 - SODIMM 46 */
        >;
    };
};

(1)

2. Apply to GPIO Controller

You need to add these pin groups to the GPIO controller’s pinctrl configuration (3):

&main_gpio0 {
    pinctrl-0 = <&pinctrl_ctrl_sleep_moci>,
                <&pinctrl_gpio_5>,
                <&pinctrl_gpio_6>,
                <&pinctrl_gpio_7>,
                <&pinctrl_gpio_8>,
                <&pinctrl_sodimm_42_gpio>,
                <&pinctrl_sodimm_44_gpio>,
                <&pinctrl_sodimm_46_gpio>;
};

(3)

3. Disable Conflicting Peripherals

You must disable any peripherals that are using these pins by default. For I²S/McASP functions, you need to disable the corresponding device nodes (3):

&main_mcasp2 {
    status = "disabled";
};

(3)

Key Points to Address

  1. Pin Controller Reference: Your pin groups should be defined under &main_pmx0, not directly under &main_gpio0 (1)

  2. Peripheral Conflicts: You must explicitly disable the McASP/I²S peripheral that’s using these pins by default (3)

  3. Pin Direction: Start with PIN_INPUT for the pin configuration rather than PIN_OUTPUT to avoid conflicts during initialization (1)

  4. GPIO Hogging: Remove the GPIO hogging initially and test basic GPIO functionality first. GPIO hogging can interfere with proper pin muxing if not configured correctly (3)

Recommended Testing Approach

  1. Create a device tree overlay following the structure shown above (3)
  2. Build and deploy the overlay using TorizonCore Builder (3)
  3. Test GPIO functionality without hogging first
  4. Verify pin muxing using /sys/kernel/debug/pinctrl/*/pinmux-pins

The issue you’re experiencing with pins remaining (MUX UNCLAIMED) typically indicates that the pin controller configuration isn’t being properly applied or there’s a conflict with another peripheral still claiming those pins.

Best regards, Toradex AI Assistant.

3

Hello Toradex Community,

I am trying to reconfigure SODIMM pins 42, 44, and 46 (GPIO0_35, GPIO0_37, GPIO0_34) on a Verdin AM62 (WiFi SoM) to act as plain GPIOs instead of their default I²S2/McASP function as mentioned earlier.

Goal: Toggle them using gpioset and read them with gpiogetor see the output on the LEDs we have connected in our board.

1. Device Tree Modification Attempt (as suggested by AI assistant above)

  • Created pinctrl groups under &main_pmx0.

  • Added them into &main_gpio0.pinctrl-0.

  • Disabled &main_mcasp1already present.

Result:

  • gpioset works and drives the pin.

  • gpioget always returns 0.

  • /sys/kernel/debug/pinctrl/*/pinmux-pins shows the pins as (MUX UNCLAIMED) or (GPIO UNCLAIMED).

  • Ethernet and other GPIOs continue working normally.

2. Device Tree Overlay Attempt

Current overlay in use (considering &mcaspi1 is already disabled in k3-am62-verdin.dtsi):

/dts-v1/;
/plugin/;

#include <dt-bindings/gpio/gpio.h>
#include <k3-pinctrl.h>

/ {
    compatible = "toradex,verdin-am62";
};

&main_pmx0 {
    pinctrl_sodimm_42_gpio: sodimm_42_gpio_grp {
        pinctrl-single,pins = < AM62X_IOPAD(0x0090, PIN_INPUT, 7) >; /* GPIO0_35 */
    };
    pinctrl_sodimm_44_gpio: sodimm_44_gpio_grp {
        pinctrl-single,pins = < AM62X_IOPAD(0x0098, PIN_INPUT, 7) >; /* GPIO0_37 */
    };
    pinctrl_sodimm_46_gpio: sodimm_46_gpio_grp {
        pinctrl-single,pins = < AM62X_IOPAD(0x008c, PIN_INPUT, 7) >; /* GPIO0_34 */
    };
};

&main_gpio0 {
    pinctrl-0 = <&pinctrl_ctrl_sleep_moci>,
                <&pinctrl_gpio_5>,
                <&pinctrl_gpio_6>,
                <&pinctrl_gpio_7>,
                <&pinctrl_gpio_8>,
                <&pinctrl_sodimm_42_gpio>,
                <&pinctrl_sodimm_44_gpio>,
                <&pinctrl_sodimm_46_gpio>;
};

Result:

  • Ethernet stops working.

  • gpiochip2 disappears (only gpiochip0 and gpiochip1 remain where gpiochip1 looks same as gpiochip2 in other cases).

  • The difference is visible in /sys/dev/char/:

Without overlay:

lrwxrwxrwx    1 root     root             0 Sep 18 10:03 13:65 -> ../../devices/platform/gpio-keys/input/input1/event1
lrwxrwxrwx    1 root     root             0 Sep 18 10:03 254:0 -> ../../devices/platform/bus@f0000/bus@f0000:bus@4000000/4201000.gpio/gpiochip0
lrwxrwxrwx    1 root     root             0 Sep 18 10:03 254:1 -> ../../devices/platform/bus@f0000/600000.gpio/gpiochip1
lrwxrwxrwx    1 root     root             0 Sep 18 10:03 254:2 -> ../../devices/platform/bus@f0000/601000.gpio/gpiochip2

With overlay:

lrwxrwxrwx    1 root     root             0 Sep 18 09:59 254:0 -> ../../devices/platform/bus@f0000/bus@f0000:bus@4000000/4201000.gpio/gpiochip0
lrwxrwxrwx    1 root     root             0 Sep 18 09:59 254:1 -> ../../devices/platform/bus@f0000/601000.gpio/gpiochip1
  • /sys/kernel/debug/pinctrl/*/pinmux-pins still shows the SODIMM pins as (MUX UNCLAIMED).

3. Observations

  • With DT modification: gpioset works, gpioget always 0, pins unclaimed, but rest of system fine.

  • With overlay: Ethernet breaks, gpiochip2 disappears, pins still unclaimed.

  • Other GPIOs (not related to I²S2/McASP) behave normally in case of DT modification but not with overlay.

4. Questions

  1. Is my overlay binding under &main_gpio0 causing the disappearance of gpiochip2 and breaking Ethernet?

  2. Do I need to structure these pinctrl groups differently for AM62-specific pinmux handling?

  3. Are there any conflicting DT fragments in the base Verdin DTS that might be overriding the overlay?

  4. What is the correct way to fully remap SODIMM 42/44/46 to GPIO without affecting Ethernet and other peripherals?

Any guidance or examples for AM62/AM62x overlays would be very helpful. Kindly mention which all files needs to be changed if DT modification is preferred or any overlays file for reference if overlay method is preferred.

Thanks in advance!

4

Hi @Anurag_Pan ,

Is your issue solved or still facing?

5

Hi @sahil.tx Still facing.. I have pasted above, what all I tried.