Hi, what is required to enable the additional UART5 Port on the SDIO port ( Pin 176, 178, 186, 188).
Please indicate software and any hardware requirements.
Thanks
Hi, what is required to enable the additional UART5 Port on the SDIO port ( Pin 176, 178, 186, 188).
Please indicate software and any hardware requirements.
Thanks
What exact BSP version are you enquiring about?
Hi Marcel.tx, sorry for the delay…
The Linux BSP version is 2.6_20160701
Thanks
hi
Thanks for the Information. For the Hardware Requirements, you just need to do the correct wiring.
For Software, you need to compile a custom kernel with the changes described below. The Steps for compiling a custom kernel are described here.
diff --git a/arch/arm/mach-tegra/board-apalis_t30-pinmux.c b/arch/arm/mach-tegra/board-apalis_t30-pinmux.c
index ae5e82fbedd5..c1316bd69e48 100644
--- a/arch/arm/mach-tegra/board-apalis_t30-pinmux.c
+++ b/arch/arm/mach-tegra/board-apalis_t30-pinmux.c
@@ -363,10 +363,10 @@ static __initdata struct tegra_pingroup_config apalis_t30_pinmux[] = {
DEFAULT_PINMUX(SDMMC1_CLK, SDMMC1, NORMAL, NORMAL, INPUT),
DEFAULT_PINMUX(SDMMC1_CMD, SDMMC1, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC1_DAT0, SDMMC1, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC1_DAT1, SDMMC1, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC1_DAT2, SDMMC1, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC1_DAT3, SDMMC1, NORMAL, NORMAL, INPUT),
+ DEFAULT_PINMUX(SDMMC1_DAT0, UARTE, NORMAL, NORMAL, INPUT),
+ DEFAULT_PINMUX(SDMMC1_DAT1, UARTE, NORMAL, NORMAL, INPUT),
+ DEFAULT_PINMUX(SDMMC1_DAT2, UARTE, NORMAL, NORMAL, INPUT),
+ DEFAULT_PINMUX(SDMMC1_DAT3, UARTE, NORMAL, NORMAL, INPUT),
#ifdef IXORA
DEFAULT_PINMUX(SDMMC3_CLK, PWM2, PULL_DOWN, TRISTATE, OUTPUT), /* NC */
diff --git a/arch/arm/mach-tegra/board-apalis_t30.c b/arch/arm/mach-tegra/board-apalis_t30.c
index fdbc2c10230e..de888137846b 100644
--- a/arch/arm/mach-tegra/board-apalis_t30.c
+++ b/arch/arm/mach-tegra/board-apalis_t30.c
@@ -1384,6 +1384,7 @@ static struct platform_device *apalis_t30_uart_devices[] __initdata = {
&tegra_uartd_device, /* Apalis UART2 */
&tegra_uartb_device, /* Apalis UART3 */
&tegra_uartc_device, /* Apalis UART4 */
+ &tegra_uarte_device, /* Apalis UART5 */
};
THANK YOU
You are welcome.