This is a very simple question, but I wanted to make absolutely certain before committing to the Apalis family. The Pinout Designer (as well as the documentation for the various Apalis iMX6-based devices) shows 4 discrete SPI interfaces, each with several available chip selects.
The Apalis Evaluation Board only offers 2 SPI interfaces, each with seemingly one chip select (if I’m interpreting the Apalis Evaluation Board datasheet correctly). Is this correct? If so, I can still use GPIO alternate functions (which supply the additional SPI interfaces) with the Evaluation Board? I’d like to use 3 SPI devices (at this stage); 2 devices on SPI1 and one device on SPI2. Can I use CS0 and CS1 on SPI1 and CS0 on SPI2 to accommodate this approach (using GPIO alternate functions)?
Any clarification would be greatly appreciated.