Verdin iMX8MP SPI2 enabled in Linux but no physical activity on pins

Technical Support
,
1

Hi everyone,

I am using a custom carrier board with a Verdin iMX8MP running Torizon OS.

I am trying to use SPI2 (ECSPI2) through spidev, but although Linux seems to configure everything correctly, I do not see any physical activity on the SPI pins with the osciloscope.

Environment

  • Module: Verdin iMX8MP

  • OS: Torizon OS 7.6.1

  • Custom carrier board

  • Built using TorizonCore Builder / OSTree

Loaded overlays

Current overlays loaded:

ls /proc/device-tree/chosen/overlays

Output:

ATE_Controller_Board_i2c5_overlay.dtbo  ATE_Controller_Board_spi2_overlay.dtbo  verdin-imx8mp_hdmi_overlay.dtbo
ATE_Controller_Board_i2c6_overlay.dtbo  name                                    verdin-imx8mp_spidev_overlay.dtbo

SPI devices

ls -l /sys/bus/spi/devices/

Output:

total 0
lrwxrwxrwx 1 root root 0 May 21 16:01 spi1.0 -> ../../../devices/platform/soc@0/30800000.bus/30800000.spba-bus/30820000.spi/spi_master/spi1/spi1.0
lrwxrwxrwx 1 root root 0 May 21 16:01 spi2.0 -> ../../../devices/platform/soc@0/30800000.bus/30800000.spba-bus/30830000.spi/spi_master/spi2/spi2.0

I am specifically trying to use:

/dev/spidev2.0 -> 30830000.spi -> ECSPI2

SPI2 pinmux status

sudo cat /sys/kernel/debug/pinctrl/30330000.pinctrl/pinmux-pins | grep -i ecspi2

Output:

pin 124 (MX8MP_IOMUXC_ECSPI2_SCLK): 30830000.spi (GPIO UNCLAIMED) function pinctrl group ecspi2customgrp
pin 125 (MX8MP_IOMUXC_ECSPI2_MOSI): 30830000.spi (GPIO UNCLAIMED) function pinctrl group ecspi2customgrp
pin 126 (MX8MP_IOMUXC_ECSPI2_MISO): 30830000.spi (GPIO UNCLAIMED) function pinctrl group ecspi2customgrp
pin 127 (MX8MP_IOMUXC_ECSPI2_SS0): 30830000.spi 30240000.gpio:141 function pinctrl group ecspi2customgrp

So Linux seems to properly mux ECSPI2 to the SPI controller.

Pins used on my custom carrier

I am using the standard Verdin SPI2 pins:

X1 pin 95 -> ECSPI2_SCLK
X1 pin 93 -> ECSPI2_MOSI
X1 pin 14 -> ECSPI2_MISO
X1 pin 12 -> ECSPI2_SS0

These are routed directly on my custom board.

Overlay used for SPI2

/dts-v1/;
/plugin/;

#include <dt-bindings/gpio/gpio.h>
#include "imx8mp-pinfunc.h"

/ {
        compatible = "toradex,verdin-imx8mp";
};

&uart4 {
        status = "disabled";
};

&ecspi2 {
        #address-cells = <1>;
        #size-cells = <0>;

        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_ecspi2_custom>;

        cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>

        status = "okay";

        spidev@0 {
                compatible = "rohm,dh2228fv";
                reg = <0>;
                spi-max-frequency = <1000000>;
        };
};

&iomuxc {
        pinctrl_ecspi2_custom: ecspi2customgrp {
                fsl,pins = <
                        MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x140
                        MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x140
                        MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x140
                        MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13   0x140
                >;
        };
};

SPI test application

Python spidev test:

import spidev
import time

spi = spidev.SpiDev()
spi.open_path("/dev/spidev2.0")

spi.mode = 0
spi.bits_per_word = 8
spi.max_speed_hz = 1000

while True:
    spi.xfer2([0xAA])
    print("transfer")
    time.sleep(0.1)

The transfers execute correctly and always return 0xFF without errors. But i can´t see anything on the SPI lines with an oscillosope.

Has anyone seen a similar issue or can confirm whether any additional configuration is required for ECSPI2 on Verdin iMX8MP?

Thanks!

2

Hi, I’m the Toradex AI Assistant.

I might make mistakes or occasionally get you wrong. Our support team will step in if needed.

I can help you troubleshoot this SPI2 issue on your Verdin iMX8MP. Looking at your configuration, there are a few potential issues that could explain why you’re not seeing physical activity on the pins.

Pin Configuration Analysis

Your overlay configuration looks mostly correct, but there’s one potential issue with the chip select pin configuration(1). In your overlay, you’re configuring the SS0 pin as a GPIO:

MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13   0x140

However, according to the SPI documentation(1), the standard approach for Verdin iMX8M Plus SPI_1 shows this pattern:

pinctrl_ecspi1: ecspi1grp {
 fsl,pins =
 <MX8MP_IOMUXC_ECSPI1_MISO__ECSPI1_MISO 0x1c4>, /* SODIMM 198 */
 <MX8MP_IOMUXC_ECSPI1_MOSI__ECSPI1_MOSI 0x4>, /* SODIMM 200 */
 <MX8MP_IOMUXC_ECSPI1_SCLK__ECSPI1_SCLK 0x4>, /* SODIMM 196 */
 <MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09 0x1c4>; /* SODIMM 202 */
};

Recommended Configuration Changes

Try modifying your overlay with these adjustments:

  1. Update pin drive strength values - Use values consistent with the working SPI1 example(1):
pinctrl_ecspi2_custom: ecspi2customgrp {
    fsl,pins = <
        MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x4
        MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x4
        MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x1c4
        MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13   0x1c4
    >;
};
  1. Verify the GPIO number - Double-check that GPIO5_IO13 corresponds to the correct hardware pin for ECSPI2_SS0 on your module.

Testing Steps

  1. Verify overlay application(2):
cat /proc/device-tree/chosen/overlays/ATE_Controller_Board_spi2_overlay.dtbo

This should return 0 if the overlay was applied successfully(2).

  1. Check for pin conflicts - Ensure UART4 is properly disabled and not conflicting with SPI2 pins(3).

  2. Test with different SPI settings:

spi.max_speed_hz = 100000  # Try slower speed
spi.mode = 0b00  # Ensure mode 0

Container Access Considerations

Since you’re running in a container environment, make sure you’re properly exposing the SPI device(1):

docker run -it --rm --device /dev/spidev2.0 <container_name>

Or use the device cgroup rules approach(1):

docker run -it --rm -v /dev:/dev --device-cgroup-rule='c 89:* rmw' <container_name>

The fact that your transfers return 0xFF without errors suggests the software stack is working, but the physical pins aren’t being driven. This typically points to a pinmux or pin configuration issue.

Best regards,
Toradex AI Assistant.

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