Hi,
we are adding a Lontium MIPI SerDes (LT947C/LT934LMT) to our custom carrier board for Verdin iMX8MP.
The Lontium INTB pin is connected to GPIO3_IO16 (SODIMM_64) on the Verdin. On the SerDes side this pin is first used as an analog strap input (ADP link rate select) and must be must be at left floating at power-onp. Later, after power-on, it is used as the interrupt output to Linux.
On our board INTB / GPIO3_IO16 has an external 10 k pull-up to 1.8 V.
With a Saleae we measured GPIO3_IO16 on the SoM side only (serializer not connected). The waveform looks like this:
-
at power-on it rises towards 1.8 V
-
then, about 840 ms after the power button is pressed, the level drops and settles at about 1.5 V and stays there
-
much later, when the Linux driver runs, it finally goes up to the full 1.8 V
This looks exactly like an internal pulldown in the i.MX8MP fighting the 10 k pull-up (10 k to 1.8 V vs. ~50 k pulldown → ~1.5 V).
I tried to fix this via a device-tree overlay so that Linux configures GPIO3_IO16 as input with no pull:
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio3>, <&pinctrl_gpio4>,
<&pinctrl_gpio7>, <&pinctrl_gpio8>,
<&pinctrl_gpio_hog2>, <&pinctrl_gpio_hog3>, <&pinctrl_gpio_hog4>;
pinctrl_serdes_gpio: serdesgp {
fsl,pins =
<MX8MP_IOMUXC_NAND_DATA03__GPIO3_IO09 0x1c4>, /* SODIMM 62 */
<MX8MP_IOMUXC_NAND_READY_B__GPIO3_IO16 0x040>; /* SODIMM 64: PE=0, no pull */
};
};
&i2c2 {
clock-frequency = <400000>;
ina220@45 {
compatible = "ti,ina220";
reg = <0x45>;
status = "okay";
};
mipi_serdes@43 {
compatible = "lontium,mipi_serdes";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_serdes_gpio>, <&pinctrl_gpio_10_dsi>;
reg = <0x43>;
interrupt-parent = <&gpio3>;
interrupts = <16 IRQ_TYPE_EDGE_FALLING>;
reset-gpios = <&gpio3 9 GPIO_ACTIVE_HIGH>;
panelreset-gpios = <&gpio4 25 GPIO_ACTIVE_HIGH>;
enable-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
deserializer@4c {
reg = <0x4c>;
};
};
};
From Linux /sys/kernel/debug/gpio shows GPIO3_IO16 as an input (no forced value), so the overlay seems to take effect – but only after Linux is up. The ~1.5 V plateau already happens much earlier in the boot sequence.
Questions:
-
Is it expected that GPIO3_IO16 comes up with an internal pulldown until Linux re-configures it, even if the DT overlay sets it to “no pull”?
-
Is there any way (U-Boot DT or board code) to force this pad to Hi-Z / no pull as early as possible so it doesn’t disturb our 1.8 V strap level on the carrier board?
-
Are there any Verdin iMX8MP pins that are guaranteed to be Hi-Z / no pull from reset that you would recommend for this kind of analog strap input?
The attached Saleae screenshot shows only the SoM GPIO3_IO16 behaviour; the SerDes is not connected in this measurement.
Thanks a lot for any hints!
