Verdin AM62 and KSZ9031RNXIC

Technical Support
1

Dear engineers,
I have question about connection Ethernet Switch KSZ9031RNXIC. I connected it to Verdin AM62 about table below. I don’t have deep knowledge about the physical level of the RGMII and the design I’m working on is based on connecting the same circuit based on previous the iMX8 project. I did an analog remapping of the RGMII layer and SPI AM62 signals to the iMX8 and the table below shows the result that should work. But I could not reliably verify the existence of the GTX_CLK signal on the AM62 board. I estimate that this signal could be connected to position 213 (ETH_2_RGMII_TXC) but I can’t work with an estimate but exact info. If it is a different pin, please provide a deeper explanation of how the offered result came about.

Toradex_Eth_Q
Toradex_Eth_Q765×521 139 KB

Best Regards
Ivan Mahdík

2

Hi, I’m the Toradex AI Assistant. I’m in early beta, and I would appreciate your feedback.
The Toradex Support team will follow up with you shortly!

Did you like my answer?

:+1: :-1:

:handshake:

The Verdin AM62 module does not natively support RMII; it supports RGMII for Ethernet connections. The KSZ9031RNXIC is a Gigabit Ethernet PHY that typically interfaces using RGMII, not RMII. Therefore, you should ensure that your design is using RGMII signals correctly.

For the GTX_CLK signal, which is essential for the RGMII interface, you should connect it to the appropriate pin on the Verdin AM62. According to the Verdin Family Specification, the RGMII_TXC signal (which corresponds to GTX_CLK) should be connected to pin 213 (ETH_2_RGMII_TXC).

Here is a brief explanation of the relevant signals for RGMII:

  • RGMII_TXC (GTX_CLK): This is the transmit clock signal for the RGMII interface.
  • RGMII_TXD[0:3]: These are the transmit data signals.
  • RGMII_TX_CTL: This is the transmit control signal.
  • RGMII_RXC: This is the receive clock signal.
  • RGMII_RXD[0:3]: These are the receive data signals.
  • RGMII_RX_CTL: This is the receive control signal.

Ensure that all these signals are correctly mapped and connected between the Verdin AM62 and the KSZ9031RNXIC PHY. If you are not seeing the GTX_CLK signal, double-check your connections and ensure that the PHY is correctly powered and initialized.

If you need further assistance with the exact pin mappings or have specific questions about the design, please provide more details about your current setup and any schematics if possible.

Best regards, Toradex AI Assistant

3

Hi, @ivanmahdik !

We recommend using our Carrier Board Design Guide whenever you have doubts about pins and connections. It gives an overview of various interfaces and schematics, including ethernet.

So, according to our guide and the Datasheet of the KSZ9031RNXIC, you are right and should connect GTX_CLK to ETH_2_RGMII_TXC.

Explaining how I got to this conclusion: I started verifying which IC we currently use on our Verdin boards and I found out that is KSZ9131RNXI. After that, I checked which pin ETH_2_RGMII_TXC is connected to and, finally, I verified if the pin on KSZ9131RNXI had the same function as GTX_CLK on KSZ9031RNXIC. With this, I could be sure that you were right about GTX_CLK connection.

Best regards.
Lucas Azeituno

4

Hi, @lucas_az.tx
Thank you very much for your complex answer :slight_smile:
I took similar steps and also came to the same information.

Best Regards
Ivan Mahdík

1 Like