Hi @qojote ,
this part of the driver below takes care of the tolerance range of the baudrate.
The tolerance is set to 0-4% or -2-4% depending on the serial controller. To make it work, one should configure the base clock at a rate that makes it possible to achieve the desired baudrate. Our team looked at the driver and it seems that it makes it possible to setup the clock base rate using the device tree.
You could try to setup the baudrate by setting “nvidia, adjust-baud-rates” property. The values setup there influence the “rate” variable in the tegra_set_baudrate function, and this variable is directly associated with the calculation that gives the error your seeing.
serial-tegra.c
1449 n_entries = of_property_count_u32_elems(np, "nvidia,adjust-baud-rates");
1450 if (n_entries > 0) {
1451 tup->n_adjustable_baud_rates = n_entries / 3;
1452 tup->baud_tolerance =
1453 devm_kzalloc(&pdev->dev, (tup->n_adjustable_baud_rates) *
1454 sizeof(*tup->baud_tolerance), GFP_KERNEL);
1455 if (!tup->baud_tolerance)
1456 return -ENOMEM;
1457 for (count = 0, index = 0; count < n_entries; count += 3,
1458 index++) {
1459 ret =
1460 of_property_read_u32_index(np,
1461 "nvidia,adjust-baud-rates",
1462 count, &pval);
1463 if (!ret)
1464 tup->baud_tolerance[index].lower_range_baud =
1465 pval;
1466 ret =
1467 of_property_read_u32_index(np,
1468 "nvidia,adjust-baud-rates",
1469 count + 1, &pval);
1470 if (!ret)
1471 tup->baud_tolerance[index].upper_range_baud =
1472 pval;
1473 ret =
1474 of_property_read_u32_index(np,
1475 "nvidia,adjust-baud-rates",
1476 count + 2, &pval);
1477 if (!ret)
1478 tup->baud_tolerance[index].tolerance =
1479 (s32)pval;
1480 }
You can try to tweak the settings in this manner.
I hope this will help a bit.
Best Regards
Kevin